mbox series

[00/11] drm: bridge: Add Samsung MIPI DSIM bridge

Message ID 20220408162108.184583-1-jagan@amarulasolutions.com (mailing list archive)
Headers show
Series drm: bridge: Add Samsung MIPI DSIM bridge | expand

Message

Jagan Teki April 8, 2022, 4:20 p.m. UTC
This series supports common bridge support for Samsung MIPI DSIM
which is used in Exynos and i.MX8MM SoC's.

Previous RFC can be available here [1].

The final bridge supports both the Exynos and i.MX8MM DSI devices.

On, summary this patch-set break the entire DSIM driver into
- platform specific glue code for platform ops, component_ops.
- common bridge driver which handle platform glue init and invoke.

Patch 0000: 	Samsung DSIM bridge

Patch 0001: 	platform init flag via driver_data

Patch 0002/9:   bridge fixes, atomic API's

Patch 0010:	document fsl,imx8mm-mipi-dsim

Patch 0011:	add i.MX8MM DSIM support

Tested in Engicam i.Core MX8M Mini SoM.

Anyone interested, please have a look on this repo [2]

[2] https://github.com/openedev/kernel/tree/imx8mm-dsi-v1 
[1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/

Any inputs?
Jagan.

Jagan Teki (11):
  drm: bridge: Add Samsung DSIM bridge driver
  drm: bridge: samsung-dsim: Handle platform init via driver_data
  drm: bridge: samsung-dsim: Mark PHY as optional
  drm: bridge: samsung-dsim: Add DSI init in bridge pre_enable()
  drm: bridge: samsung-dsim: Fix PLL_P (PMS_P) offset
  drm: bridge: samsung-dsim: Add module init, exit
  drm: bridge: samsung-dsim: Add atomic_check
  drm: bridge: samsung-dsim: Add atomic_get_input_bus_fmts
  drm: bridge: samsung-dsim: Add input_bus_flags
  dt-bindings: display: exynos: dsim: Add NXP i.MX8MM support
  drm: bridge: samsung-dsim: Add i.MX8MM support

 .../bindings/display/exynos/exynos_dsim.txt   |    1 +
 MAINTAINERS                                   |   12 +
 drivers/gpu/drm/bridge/Kconfig                |   12 +
 drivers/gpu/drm/bridge/Makefile               |    1 +
 drivers/gpu/drm/bridge/samsung-dsim.c         | 1803 +++++++++++++++++
 drivers/gpu/drm/exynos/Kconfig                |    1 +
 drivers/gpu/drm/exynos/exynos_drm_dsi.c       | 1704 +---------------
 include/drm/bridge/samsung-dsim.h             |   97 +
 8 files changed, 1982 insertions(+), 1649 deletions(-)
 create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c
 create mode 100644 include/drm/bridge/samsung-dsim.h

Comments

Tim Harvey April 9, 2022, 12:25 a.m. UTC | #1
On Fri, Apr 8, 2022 at 9:22 AM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> This series supports common bridge support for Samsung MIPI DSIM
> which is used in Exynos and i.MX8MM SoC's.
>
> Previous RFC can be available here [1].
>
> The final bridge supports both the Exynos and i.MX8MM DSI devices.
>
> On, summary this patch-set break the entire DSIM driver into
> - platform specific glue code for platform ops, component_ops.
> - common bridge driver which handle platform glue init and invoke.
>
> Patch 0000:     Samsung DSIM bridge
>
> Patch 0001:     platform init flag via driver_data
>
> Patch 0002/9:   bridge fixes, atomic API's
>
> Patch 0010:     document fsl,imx8mm-mipi-dsim
>
> Patch 0011:     add i.MX8MM DSIM support
>
> Tested in Engicam i.Core MX8M Mini SoM.
>
> Anyone interested, please have a look on this repo [2]
>
> [2] https://github.com/openedev/kernel/tree/imx8mm-dsi-v1
> [1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/
>
> Any inputs?
> Jagan.
>
> Jagan Teki (11):
>   drm: bridge: Add Samsung DSIM bridge driver
>   drm: bridge: samsung-dsim: Handle platform init via driver_data
>   drm: bridge: samsung-dsim: Mark PHY as optional
>   drm: bridge: samsung-dsim: Add DSI init in bridge pre_enable()
>   drm: bridge: samsung-dsim: Fix PLL_P (PMS_P) offset
>   drm: bridge: samsung-dsim: Add module init, exit
>   drm: bridge: samsung-dsim: Add atomic_check
>   drm: bridge: samsung-dsim: Add atomic_get_input_bus_fmts
>   drm: bridge: samsung-dsim: Add input_bus_flags
>   dt-bindings: display: exynos: dsim: Add NXP i.MX8MM support
>   drm: bridge: samsung-dsim: Add i.MX8MM support
>
>  .../bindings/display/exynos/exynos_dsim.txt   |    1 +
>  MAINTAINERS                                   |   12 +
>  drivers/gpu/drm/bridge/Kconfig                |   12 +
>  drivers/gpu/drm/bridge/Makefile               |    1 +
>  drivers/gpu/drm/bridge/samsung-dsim.c         | 1803 +++++++++++++++++
>  drivers/gpu/drm/exynos/Kconfig                |    1 +
>  drivers/gpu/drm/exynos/exynos_drm_dsi.c       | 1704 +---------------
>  include/drm/bridge/samsung-dsim.h             |   97 +
>  8 files changed, 1982 insertions(+), 1649 deletions(-)
>  create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c
>  create mode 100644 include/drm/bridge/samsung-dsim.h
>
> --
> 2.25.1
>

Jagan,

Thanks so much for continuing to work this through!

I've successfully tested this series on imx8mm-venice-gw73xx-0x using
the following:
- DFROBOT 7" raspberrypi touchscreen display (DFR0506) [1]
- the following defconfig:
CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY
CONFIG_DRM_PANEL_SIMPLE
CONFIG_DRM_PANEL_BRIDGE
CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN
CONFIG_DRM_TOSHIBA_TC358762
CONFIG_DRM_SAMSUNG_DSIM
CONFIG_DRM_MXSFB
- the following dt overlay:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2022 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>

#include "imx8mm-pinfunc.h"

/dts-v1/;
/plugin/;

&{/} {
        compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";

        panel {
                compatible = "powertip,ph800480t013-idf02";
                power-supply = <&attiny>;
                backlight = <&attiny>;

                port {
                        panel_out_bridge: endpoint {
                                remote-endpoint = <&bridge_out_panel>;
                        };
                };
        };
};

&i2c3 {
        #address-cells = <1>;
        #size-cells = <0>;

        attiny: regulator@45 {
                compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
                reg = <0x45>;
        };
};

&lcdif {
        status = "okay";
};

&dsi {
        #address-cells = <1>;
        #size-cells = <0>;
        status = "okay";

        bridge@0 {
                compatible = "toshiba,tc358762";
                reg = <0>;
                vddc-supply = <&attiny>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "okay";

                ports {
                        #address-cells = <1>;
                        #size-cells = <0>;

                        port@0 {
                                reg = <0>;
                                bridge_in_dsi: endpoint {
                                        remote-endpoint = <&dsi_out_bridge>;
                                        data-lanes = <0 1>;
                                };
                        };

                        port@1 {
                                reg = <1>;
                                bridge_out_panel: endpoint {
                                        remote-endpoint = <&panel_out_bridge>;
                                };
                        };
                };
        };

        ports {
                #address-cells = <1>;
                #size-cells = <0>;

                port@1 {
                        reg = <1>;

                        dsi_out_bridge: endpoint {
                                remote-endpoint = <&bridge_in_dsi>;
                        };
                };
        };
};

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mm-venice-gw73xx with DFR0506

I'll be happy to test any follow-on series as needed.

Best Regards,

Tim
[1] https://www.dfrobot.com/product-1655.html
Alexander Stein April 11, 2022, 1:11 p.m. UTC | #2
Hi Jagan,

thanks for picking this up again and sending a new version.

Am Freitag, 8. April 2022, 18:20:57 CEST schrieb Jagan Teki:
> This series supports common bridge support for Samsung MIPI DSIM
> which is used in Exynos and i.MX8MM SoC's.
> 
> Previous RFC can be available here [1].
> 
> The final bridge supports both the Exynos and i.MX8MM DSI devices.
> 
> On, summary this patch-set break the entire DSIM driver into
> - platform specific glue code for platform ops, component_ops.
> - common bridge driver which handle platform glue init and invoke.
> 
> Patch 0000: 	Samsung DSIM bridge
> 
> Patch 0001: 	platform init flag via driver_data
> 
> Patch 0002/9:   bridge fixes, atomic API's
> 
> Patch 0010:	document fsl,imx8mm-mipi-dsim
> 
> Patch 0011:	add i.MX8MM DSIM support
> 
> Tested in Engicam i.Core MX8M Mini SoM.
> 
> Anyone interested, please have a look on this repo [2]
> 
> [2] https://github.com/openedev/kernel/tree/imx8mm-dsi-v1
> [1]
> https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/
> T/
> 
> Any inputs?

With the following patch I can use LVDS, connected via an LVDS bridge on my 
TQMa8MxML + MBa8Mx. Unless I enable 4 MIPI-DSI lanes.
Using "data-lanes = <1 2 3 4>;" instead show a flickering image, but the 
"content" seems ok. On the downstream kernel MIPI-DSI is working, apparently 
using 4-lanes. On the first glance a bigger difference to the downstream 
kernel from NXP is that AFAICS they change the clocks depending on the 
currently selected mode [1]. I tried playing with the clocks but I don't fully 
grasp which clock has which effect, so I eventually had no results.
Any ideas what might be wrong here?

On a side note, might be completely unrelated to this series, I get the 
following warning as well:
> sn65dsi83 2-002d: Unsupported LVDS bus format 0x100a, please check output 
bridge driver. Falling back to SPWG24.

0x100a is MEDIA_BUS_FMT_RGB888_1X24 from 
samsung_dsim_atomic_get_input_bus_fmts(). For some reason this is propagates 
to the output_bus_cfg used in sn65dsi83_atomic_enable(). I would have expected 
this is MEDIA_BUS_FMT_RGB888_1X7X4_SPWG from "tianma,tm070jvhg33" display.

Best regards,
Alexander

[1] https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/
bridge/sec-dsim.c?h=lf-5.10.72-2.2.0#n1255

Here is my patch for the DT
--->8---
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/
freescale/Makefile
index 52ce0f798657..7dd280b45681 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -58,6 +58,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
+
+tqma8mqml-mba8mx-imx327-dtbs += imx8mm-tqma8mqml-mba8mx.dtb imx8mm-tqma8mqml-
mba8mx-imx327.dtbo
+tqma8mqml-mba8mx-lvds-dtbs += imx8mm-tqma8mqml-mba8mx.dtb imx8mm-tqma8mqml-
mba8mx-lvds.dtbo
+dtb-$(CONFIG_ARCH_MXC) += tqma8mqml-mba8mx-imx327.dtb tqma8mqml-mba8mx-
lvds.dtb
+
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-lvds.dts b/
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-lvds.dts
new file mode 100644
index 000000000000..8c743d291459
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-lvds.dts
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright 2021-2022 TQ-Systems GmbH
+ */
+
+/dts-v1/;
+/plugin/;
+
+&{/} {
+	compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", 
"fsl,imx8mm";
+};
+
+&backlight_lvds0 {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	ports {
+		port@1 {
+			mipi_dsi_out: endpoint {
+				remote-endpoint = 
<&lvds_bridge_in>;
+			};
+		};
+	};
+};
+
+&dsi_lvds_bridge {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			lvds_bridge_in: endpoint {
+				data-lanes = <1 2 3>;
+				remote-endpoint = <&mipi_dsi_out>;
+			};
+		};
+	};
+};
+
+&expander0 {
+	dsi-mux-oe-hog {
+		gpio-hog;
+		gpios = <10 0>;
+		output-low;
+		line-name = "DSI_MUX_OE#";
+	};
+};
+
+&lcdif {
+	status = "okay";
+};
+
+&panel0 {
+	compatible = "tianma,tm070jvhg33";
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/
freescale/mba8mx.dtsi
index c2f0f1a1566c..4b2cca3268eb 100644
--- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi
+++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi
@@ -8,6 +8,16 @@
 /* TQ-Systems GmbH MBa8Mx baseboard */
 
 / {
+	backlight_lvds0: backlight0 {
+		compatible = "pwm-backlight";
+		pwms = <&pwm3 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+		power-supply = <&reg_12v>;
+		enable-gpios = <&expander2 2 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+
 	beeper {
 		compatible = "pwm-beeper";
 		pwms = <&pwm4 0 250000 0>;
@@ -66,12 +76,31 @@ led2: led2 {
 		};
 	};
 
+	panel0: panel_lvds0 {
+		backlight = <&backlight_lvds0>;
+		status = "disabled";
+
+		port {
+			panel_in_lvds0: endpoint {
+				remote-endpoint = 
<&lvds_bridge_out>;
+			};
+		};
+	};
+
 	pcie0_refclk: pcie0-refclk {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 		clock-frequency = <100000000>;
 	};
 
+	reg_12v: regulator-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "MBA8MX_12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-always-on;
+	};
+
 	reg_hub_vbus: regulator-hub-vbus {
 		compatible = "regulator-fixed";
 		regulator-name = "MBA8MX_HUB_VBUS";
@@ -227,6 +256,27 @@ &i2c3 {
 	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 	status = "okay";
+
+	dsi_lvds_bridge: dsi-lvds-bridge@2d {
+		compatible = "ti,sn65dsi83";
+		reg = <0x2d>;
+		enable-gpios = <&expander0 6 GPIO_ACTIVE_HIGH>;
+		vcc-supply = <&reg_sn65dsi83_1v8>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@2 {
+				reg = <2>;
+
+				lvds_bridge_out: endpoint {
+					remote-endpoint = 
<&panel_in_lvds0>;
+				};
+			};
+		};
+	};
 };
 
 &pwm3 {
--->8---
Marek Szyprowski April 11, 2022, 1:56 p.m. UTC | #3
On 08.04.2022 18:20, Jagan Teki wrote:
> This series supports common bridge support for Samsung MIPI DSIM
> which is used in Exynos and i.MX8MM SoC's.
>
> Previous RFC can be available here [1].
>
> The final bridge supports both the Exynos and i.MX8MM DSI devices.
>
> On, summary this patch-set break the entire DSIM driver into
> - platform specific glue code for platform ops, component_ops.
> - common bridge driver which handle platform glue init and invoke.
>
> Patch 0000: 	Samsung DSIM bridge
>
> Patch 0001: 	platform init flag via driver_data
>
> Patch 0002/9:   bridge fixes, atomic API's
>
> Patch 0010:	document fsl,imx8mm-mipi-dsim
>
> Patch 0011:	add i.MX8MM DSIM support
>
> Tested in Engicam i.Core MX8M Mini SoM.
>
> Anyone interested, please have a look on this repo [2]
>
> [2] https://protect2.fireeye.com/v1/url?k=930e329a-f28527b5-930fb9d5-74fe485cbfe7-b0c53e2d688ddbc5&q=1&e=e6aa727d-5ae2-4ca5-bff3-7f62d8fae87e&u=https%3A%2F%2Fgithub.com%2Fopenedev%2Fkernel%2Ftree%2Fimx8mm-dsi-v1
> [1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/
>
> Any inputs?

I wanted to test this on the Exynos, but I wasn't able to find what base 
should I apply this patchset. I've tried linux-next as well as 
95a2441e4347 ("drm: exynos: dsi: Switch to atomic funcs").

Please note that pointing a proper base for the patchset is really 
essential if you really want others to test it.


> Jagan.
>
> Jagan Teki (11):
>    drm: bridge: Add Samsung DSIM bridge driver
>    drm: bridge: samsung-dsim: Handle platform init via driver_data
>    drm: bridge: samsung-dsim: Mark PHY as optional
>    drm: bridge: samsung-dsim: Add DSI init in bridge pre_enable()
>    drm: bridge: samsung-dsim: Fix PLL_P (PMS_P) offset
>    drm: bridge: samsung-dsim: Add module init, exit
>    drm: bridge: samsung-dsim: Add atomic_check
>    drm: bridge: samsung-dsim: Add atomic_get_input_bus_fmts
>    drm: bridge: samsung-dsim: Add input_bus_flags
>    dt-bindings: display: exynos: dsim: Add NXP i.MX8MM support
>    drm: bridge: samsung-dsim: Add i.MX8MM support
>
>   .../bindings/display/exynos/exynos_dsim.txt   |    1 +
>   MAINTAINERS                                   |   12 +
>   drivers/gpu/drm/bridge/Kconfig                |   12 +
>   drivers/gpu/drm/bridge/Makefile               |    1 +
>   drivers/gpu/drm/bridge/samsung-dsim.c         | 1803 +++++++++++++++++
>   drivers/gpu/drm/exynos/Kconfig                |    1 +
>   drivers/gpu/drm/exynos/exynos_drm_dsi.c       | 1704 +---------------
>   include/drm/bridge/samsung-dsim.h             |   97 +
>   8 files changed, 1982 insertions(+), 1649 deletions(-)
>   create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c
>   create mode 100644 include/drm/bridge/samsung-dsim.h
>
Best regards
Adam Ford April 11, 2022, 2:39 p.m. UTC | #4
On Mon, Apr 11, 2022 at 8:56 AM Marek Szyprowski
<m.szyprowski@samsung.com> wrote:
>
> On 08.04.2022 18:20, Jagan Teki wrote:
> > This series supports common bridge support for Samsung MIPI DSIM
> > which is used in Exynos and i.MX8MM SoC's.
> >
> > Previous RFC can be available here [1].
> >
> > The final bridge supports both the Exynos and i.MX8MM DSI devices.
> >
> > On, summary this patch-set break the entire DSIM driver into
> > - platform specific glue code for platform ops, component_ops.
> > - common bridge driver which handle platform glue init and invoke.
> >
> > Patch 0000:   Samsung DSIM bridge
> >
> > Patch 0001:   platform init flag via driver_data
> >
> > Patch 0002/9:   bridge fixes, atomic API's
> >
> > Patch 0010:   document fsl,imx8mm-mipi-dsim
> >
> > Patch 0011:   add i.MX8MM DSIM support
> >
> > Tested in Engicam i.Core MX8M Mini SoM.
> >
> > Anyone interested, please have a look on this repo [2]
> >
> > [2] https://protect2.fireeye.com/v1/url?k=930e329a-f28527b5-930fb9d5-74fe485cbfe7-b0c53e2d688ddbc5&q=1&e=e6aa727d-5ae2-4ca5-bff3-7f62d8fae87e&u=https%3A%2F%2Fgithub.com%2Fopenedev%2Fkernel%2Ftree%2Fimx8mm-dsi-v1
> > [1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/
> >
> > Any inputs?
>
> I wanted to test this on the Exynos, but I wasn't able to find what base
> should I apply this patchset. I've tried linux-next as well as
> 95a2441e4347 ("drm: exynos: dsi: Switch to atomic funcs").
>
> Please note that pointing a proper base for the patchset is really
> essential if you really want others to test it.

Can you clone his repo and test that?  He posted it above.  I was
going to clone it at some point this week to give it a try.

adam
>
>
> > Jagan.
> >
> > Jagan Teki (11):
> >    drm: bridge: Add Samsung DSIM bridge driver
> >    drm: bridge: samsung-dsim: Handle platform init via driver_data
> >    drm: bridge: samsung-dsim: Mark PHY as optional
> >    drm: bridge: samsung-dsim: Add DSI init in bridge pre_enable()
> >    drm: bridge: samsung-dsim: Fix PLL_P (PMS_P) offset
> >    drm: bridge: samsung-dsim: Add module init, exit
> >    drm: bridge: samsung-dsim: Add atomic_check
> >    drm: bridge: samsung-dsim: Add atomic_get_input_bus_fmts
> >    drm: bridge: samsung-dsim: Add input_bus_flags
> >    dt-bindings: display: exynos: dsim: Add NXP i.MX8MM support
> >    drm: bridge: samsung-dsim: Add i.MX8MM support
> >
> >   .../bindings/display/exynos/exynos_dsim.txt   |    1 +
> >   MAINTAINERS                                   |   12 +
> >   drivers/gpu/drm/bridge/Kconfig                |   12 +
> >   drivers/gpu/drm/bridge/Makefile               |    1 +
> >   drivers/gpu/drm/bridge/samsung-dsim.c         | 1803 +++++++++++++++++
> >   drivers/gpu/drm/exynos/Kconfig                |    1 +
> >   drivers/gpu/drm/exynos/exynos_drm_dsi.c       | 1704 +---------------
> >   include/drm/bridge/samsung-dsim.h             |   97 +
> >   8 files changed, 1982 insertions(+), 1649 deletions(-)
> >   create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c
> >   create mode 100644 include/drm/bridge/samsung-dsim.h
> >
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
>
Adam Ford April 11, 2022, 3:29 p.m. UTC | #5
On Mon, Apr 11, 2022 at 9:39 AM Adam Ford <aford173@gmail.com> wrote:
>
> On Mon, Apr 11, 2022 at 8:56 AM Marek Szyprowski
> <m.szyprowski@samsung.com> wrote:
> >
> > On 08.04.2022 18:20, Jagan Teki wrote:
> > > This series supports common bridge support for Samsung MIPI DSIM
> > > which is used in Exynos and i.MX8MM SoC's.
> > >
> > > Previous RFC can be available here [1].
> > >
> > > The final bridge supports both the Exynos and i.MX8MM DSI devices.
> > >
> > > On, summary this patch-set break the entire DSIM driver into
> > > - platform specific glue code for platform ops, component_ops.
> > > - common bridge driver which handle platform glue init and invoke.
> > >
> > > Patch 0000:   Samsung DSIM bridge
> > >
> > > Patch 0001:   platform init flag via driver_data
> > >
> > > Patch 0002/9:   bridge fixes, atomic API's
> > >
> > > Patch 0010:   document fsl,imx8mm-mipi-dsim
> > >
> > > Patch 0011:   add i.MX8MM DSIM support
> > >
> > > Tested in Engicam i.Core MX8M Mini SoM.
> > >
> > > Anyone interested, please have a look on this repo [2]
> > >
> > > [2] https://protect2.fireeye.com/v1/url?k=930e329a-f28527b5-930fb9d5-74fe485cbfe7-b0c53e2d688ddbc5&q=1&e=e6aa727d-5ae2-4ca5-bff3-7f62d8fae87e&u=https%3A%2F%2Fgithub.com%2Fopenedev%2Fkernel%2Ftree%2Fimx8mm-dsi-v1
> > > [1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/
> > >
> > > Any inputs?
> >
> > I wanted to test this on the Exynos, but I wasn't able to find what base
> > should I apply this patchset. I've tried linux-next as well as
> > 95a2441e4347 ("drm: exynos: dsi: Switch to atomic funcs").
> >
> > Please note that pointing a proper base for the patchset is really
> > essential if you really want others to test it.
>
> Can you clone his repo and test that?  He posted it above.  I was
> going to clone it at some point this week to give it a try.

Jagan,

Is there anyway you could rebase this onto 5.18-rc1? Marek was having
issues applying patches to a known branch, and it looks like I cannot
enable stuff on Nano without applying a bunch of patches, because this
base lacks the power-domain features on Nano that are present in the
5.18-rc1.

thanks,

adam

>
> adam
> >
> >
> > > Jagan.
> > >
> > > Jagan Teki (11):
> > >    drm: bridge: Add Samsung DSIM bridge driver
> > >    drm: bridge: samsung-dsim: Handle platform init via driver_data
> > >    drm: bridge: samsung-dsim: Mark PHY as optional
> > >    drm: bridge: samsung-dsim: Add DSI init in bridge pre_enable()
> > >    drm: bridge: samsung-dsim: Fix PLL_P (PMS_P) offset
> > >    drm: bridge: samsung-dsim: Add module init, exit
> > >    drm: bridge: samsung-dsim: Add atomic_check
> > >    drm: bridge: samsung-dsim: Add atomic_get_input_bus_fmts
> > >    drm: bridge: samsung-dsim: Add input_bus_flags
> > >    dt-bindings: display: exynos: dsim: Add NXP i.MX8MM support
> > >    drm: bridge: samsung-dsim: Add i.MX8MM support
> > >
> > >   .../bindings/display/exynos/exynos_dsim.txt   |    1 +
> > >   MAINTAINERS                                   |   12 +
> > >   drivers/gpu/drm/bridge/Kconfig                |   12 +
> > >   drivers/gpu/drm/bridge/Makefile               |    1 +
> > >   drivers/gpu/drm/bridge/samsung-dsim.c         | 1803 +++++++++++++++++
> > >   drivers/gpu/drm/exynos/Kconfig                |    1 +
> > >   drivers/gpu/drm/exynos/exynos_drm_dsi.c       | 1704 +---------------
> > >   include/drm/bridge/samsung-dsim.h             |   97 +
> > >   8 files changed, 1982 insertions(+), 1649 deletions(-)
> > >   create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c
> > >   create mode 100644 include/drm/bridge/samsung-dsim.h
> > >
> > Best regards
> > --
> > Marek Szyprowski, PhD
> > Samsung R&D Institute Poland
> >
Marek Szyprowski April 11, 2022, 4:25 p.m. UTC | #6
On 11.04.2022 16:39, Adam Ford wrote:
> On Mon, Apr 11, 2022 at 8:56 AM Marek Szyprowski
> <m.szyprowski@samsung.com> wrote:
>> On 08.04.2022 18:20, Jagan Teki wrote:
>>> This series supports common bridge support for Samsung MIPI DSIM
>>> which is used in Exynos and i.MX8MM SoC's.
>>>
>>> Previous RFC can be available here [1].
>>>
>>> The final bridge supports both the Exynos and i.MX8MM DSI devices.
>>>
>>> On, summary this patch-set break the entire DSIM driver into
>>> - platform specific glue code for platform ops, component_ops.
>>> - common bridge driver which handle platform glue init and invoke.
>>>
>>> Patch 0000:   Samsung DSIM bridge
>>>
>>> Patch 0001:   platform init flag via driver_data
>>>
>>> Patch 0002/9:   bridge fixes, atomic API's
>>>
>>> Patch 0010:   document fsl,imx8mm-mipi-dsim
>>>
>>> Patch 0011:   add i.MX8MM DSIM support
>>>
>>> Tested in Engicam i.Core MX8M Mini SoM.
>>>
>>> Anyone interested, please have a look on this repo [2]
>>>
>>> [2] https://protect2.fireeye.com/v1/url?k=930e329a-f28527b5-930fb9d5-74fe485cbfe7-b0c53e2d688ddbc5&q=1&e=e6aa727d-5ae2-4ca5-bff3-7f62d8fae87e&u=https%3A%2F%2Fgithub.com%2Fopenedev%2Fkernel%2Ftree%2Fimx8mm-dsi-v1
>>> [1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/
>>>
>>> Any inputs?
>> I wanted to test this on the Exynos, but I wasn't able to find what base
>> should I apply this patchset. I've tried linux-next as well as
>> 95a2441e4347 ("drm: exynos: dsi: Switch to atomic funcs").
>>
>> Please note that pointing a proper base for the patchset is really
>> essential if you really want others to test it.
> Can you clone his repo and test that?  He posted it above.  I was
> going to clone it at some point this week to give it a try.

Okay, my fault. I've missed that.

There is a trivial compilation issue, 
drivers/gpu/drm/exynos/exynos_drm_dsi.c lacks "#include 
<linux/gpio/consumer.h>" after conversion. Besides that, it simply nukes 
on the simplest Exynos setup (exynos4210-trats) during the initialization:

[drm] Exynos DRM: using 11c00000.fimd device for DMA mapping operations
exynos-drm exynos-drm: bound 11c00000.fimd (ops fimd_component_ops)
8<--- cut here ---
Unable to handle kernel NULL pointer dereference at virtual address 00000048
[00000048] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 
5.17.0-rc2-00577-g22e968113668-dirty #11635
Hardware name: Samsung Exynos (Flattened Device Tree)
PC is at exynos_dsi_bind+0x14/0x3c
LR is at component_bind_all+0x130/0x290
pc : [<c06924e0>]    lr : [<c06b0f6c>]    psr: 60000113
sp : c1cafcb8  ip : 00000002  fp : c0f4a53c
r10: c135e6a8  r9 : c1efd800  r8 : 00000000
r7 : c26d2100  r6 : c2c69fc0  r5 : 00000018  r4 : 00000000
r3 : c06924cc  r2 : 00000002  r1 : 00000000  r0 : c1efd800
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
Control: 10c5387d  Table: 4000404a  DAC: 00000051
Register r0 information: slab kmalloc-2k start c1efd800 pointer offset 0 
size 2048
Register r1 information: NULL pointer
Register r2 information: non-paged memory
Register r3 information: non-slab/vmalloc memory
Register r4 information: NULL pointer
Register r5 information: non-paged memory
Register r6 information: slab kmalloc-64 start c2c69fc0 pointer offset 0 
size 64
Register r7 information: slab kmalloc-64 start c26d2100 pointer offset 0 
size 64
Register r8 information: NULL pointer
Register r9 information: slab kmalloc-2k start c1efd800 pointer offset 0 
size 2048
Register r10 information: non-slab/vmalloc memory
Register r11 information: non-slab/vmalloc memory
Register r12 information: non-paged memory
Process swapper/0 (pid: 1, stack limit = 0x(ptrval))
Stack: (0xc1cafcb8 to 0xc1cb0000)
...
  exynos_dsi_bind from component_bind_all+0x130/0x290
  component_bind_all from exynos_drm_bind+0xe8/0x194
  exynos_drm_bind from try_to_bring_up_master+0x208/0x2d0
  try_to_bring_up_master from component_master_add_with_match+0xd0/0x104
  component_master_add_with_match from exynos_drm_platform_probe+0xe8/0x118
  exynos_drm_platform_probe from platform_probe+0x80/0xc0
  platform_probe from really_probe+0xfc/0x440
  really_probe from __driver_probe_device+0xa4/0x204
  __driver_probe_device from driver_probe_device+0x34/0xd4
  driver_probe_device from __driver_attach+0x114/0x184
  __driver_attach from bus_for_each_dev+0x64/0xb0
  bus_for_each_dev from bus_add_driver+0x170/0x20c
  bus_add_driver from driver_register+0x78/0x10c
  driver_register from exynos_drm_init+0xe0/0x14c
  exynos_drm_init from do_one_initcall+0x6c/0x3a4
  do_one_initcall from kernel_init_freeable+0x1c4/0x214
  kernel_init_freeable from kernel_init+0x18/0x12c
  kernel_init from ret_from_fork+0x14/0x2c
Exception stack(0xc1caffb0 to 0xc1cafff8)
ffa0:                                     00000000 00000000 00000000 
00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000
Code: e5904040 e1a00002 e3a02002 e1a01004 (e5945048)
---[ end trace 0000000000000000 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
CPU1: stopping
CPU: 1 PID: 0 Comm: swapper/1 Tainted: G      D 
5.17.0-rc2-00577-g22e968113668-dirty #11635
Hardware name: Samsung Exynos (Flattened Device Tree)
  unwind_backtrace from show_stack+0x10/0x14
  show_stack from dump_stack_lvl+0x58/0x70
  dump_stack_lvl from do_handle_IPI+0x2ec/0x36c
  do_handle_IPI from ipi_handler+0x18/0x20
  ipi_handler from handle_percpu_devid_irq+0xd0/0x394
  handle_percpu_devid_irq from generic_handle_domain_irq+0x44/0x88
  generic_handle_domain_irq from gic_handle_irq+0x88/0xac
  gic_handle_irq from generic_handle_arch_irq+0x58/0x78
  generic_handle_arch_irq from __irq_svc+0x54/0x88
Exception stack(0xc1cd1f48 to 0xc1cd1f90)
1f40:                   00000001 c0eff5a4 00000001 c011ca80 c1208f0c 
c1353420
1f60: 00000000 c1d8d000 00000000 c0f34234 c1d8d000 00000000 c0eeee98 
c1cd1f98
1f80: c0109144 c0109148 20000013 ffffffff
  __irq_svc from arch_cpu_idle+0x40/0x44
  arch_cpu_idle from default_idle_call+0x74/0x2c4
  default_idle_call from do_idle+0x1cc/0x284
  do_idle from cpu_startup_entry+0x18/0x1c
  cpu_startup_entry from 0x401018b4
---[ end Kernel panic - not syncing: Attempted to kill init! 
exitcode=0x0000000b ]---


I will try to take a look into this later in the evening.


Best regards
Adam Ford April 11, 2022, 8:26 p.m. UTC | #7
On Mon, Apr 11, 2022 at 11:25 AM Marek Szyprowski
<m.szyprowski@samsung.com> wrote:
>
> On 11.04.2022 16:39, Adam Ford wrote:
> > On Mon, Apr 11, 2022 at 8:56 AM Marek Szyprowski
> > <m.szyprowski@samsung.com> wrote:
> >> On 08.04.2022 18:20, Jagan Teki wrote:
> >>> This series supports common bridge support for Samsung MIPI DSIM
> >>> which is used in Exynos and i.MX8MM SoC's.
> >>>
> >>> Previous RFC can be available here [1].
> >>>
> >>> The final bridge supports both the Exynos and i.MX8MM DSI devices.
> >>>
> >>> On, summary this patch-set break the entire DSIM driver into
> >>> - platform specific glue code for platform ops, component_ops.
> >>> - common bridge driver which handle platform glue init and invoke.
> >>>
> >>> Patch 0000:   Samsung DSIM bridge
> >>>
> >>> Patch 0001:   platform init flag via driver_data
> >>>
> >>> Patch 0002/9:   bridge fixes, atomic API's
> >>>
> >>> Patch 0010:   document fsl,imx8mm-mipi-dsim
> >>>
> >>> Patch 0011:   add i.MX8MM DSIM support
> >>>
> >>> Tested in Engicam i.Core MX8M Mini SoM.
> >>>
> >>> Anyone interested, please have a look on this repo [2]

I attempted to build your newer repo, but I get build errors:

~/src/linux-opendev$ make Image modules ARCH=arm64
CROSS_COMPILE=aarch64-linux-gnu- -j8
  CALL    scripts/atomic/check-atomics.sh
  CALL    scripts/checksyscalls.sh
  CHK     include/generated/compile.h
  MODPOST modules-only.symvers
ERROR: modpost: "dsi_driver" [drivers/gpu/drm/exynos/exynosdrm.ko] undefined!
make[1]: *** [scripts/Makefile.modpost:134: modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
make: *** [Makefile:1746: modules] Error 2

I'm using gcc version 11.2.0 (Ubuntu 11.2.0-17ubuntu1) part of the
ubuntu 22.04 beta.  I know it's beta, so it might be buggy, but I
expect GCC 11.2 to be stable.

I'm going to keep investigating.  If I find a fix, I'll send you a
private message with the patch attached to avoid spamming everyone.

adam

> >>>
> >>> [2] https://protect2.fireeye.com/v1/url?k=930e329a-f28527b5-930fb9d5-74fe485cbfe7-b0c53e2d688ddbc5&q=1&e=e6aa727d-5ae2-4ca5-bff3-7f62d8fae87e&u=https%3A%2F%2Fgithub.com%2Fopenedev%2Fkernel%2Ftree%2Fimx8mm-dsi-v1
> >>> [1] https://lore.kernel.org/linux-arm-kernel/YP2j9k5SrZ2%2Fo2%2F5@ravnborg.org/T/
> >>>
> >>> Any inputs?
> >> I wanted to test this on the Exynos, but I wasn't able to find what base
> >> should I apply this patchset. I've tried linux-next as well as
> >> 95a2441e4347 ("drm: exynos: dsi: Switch to atomic funcs").
> >>
> >> Please note that pointing a proper base for the patchset is really
> >> essential if you really want others to test it.
> > Can you clone his repo and test that?  He posted it above.  I was
> > going to clone it at some point this week to give it a try.
>
> Okay, my fault. I've missed that.
>
> There is a trivial compilation issue,
> drivers/gpu/drm/exynos/exynos_drm_dsi.c lacks "#include
> <linux/gpio/consumer.h>" after conversion. Besides that, it simply nukes
> on the simplest Exynos setup (exynos4210-trats) during the initialization:
>
> [drm] Exynos DRM: using 11c00000.fimd device for DMA mapping operations
> exynos-drm exynos-drm: bound 11c00000.fimd (ops fimd_component_ops)
> 8<--- cut here ---
> Unable to handle kernel NULL pointer dereference at virtual address 00000048
> [00000048] *pgd=00000000
> Internal error: Oops: 5 [#1] PREEMPT SMP ARM
> Modules linked in:
> CPU: 0 PID: 1 Comm: swapper/0 Not tainted
> 5.17.0-rc2-00577-g22e968113668-dirty #11635
> Hardware name: Samsung Exynos (Flattened Device Tree)
> PC is at exynos_dsi_bind+0x14/0x3c
> LR is at component_bind_all+0x130/0x290
> pc : [<c06924e0>]    lr : [<c06b0f6c>]    psr: 60000113
> sp : c1cafcb8  ip : 00000002  fp : c0f4a53c
> r10: c135e6a8  r9 : c1efd800  r8 : 00000000
> r7 : c26d2100  r6 : c2c69fc0  r5 : 00000018  r4 : 00000000
> r3 : c06924cc  r2 : 00000002  r1 : 00000000  r0 : c1efd800
> Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
> Control: 10c5387d  Table: 4000404a  DAC: 00000051
> Register r0 information: slab kmalloc-2k start c1efd800 pointer offset 0
> size 2048
> Register r1 information: NULL pointer
> Register r2 information: non-paged memory
> Register r3 information: non-slab/vmalloc memory
> Register r4 information: NULL pointer
> Register r5 information: non-paged memory
> Register r6 information: slab kmalloc-64 start c2c69fc0 pointer offset 0
> size 64
> Register r7 information: slab kmalloc-64 start c26d2100 pointer offset 0
> size 64
> Register r8 information: NULL pointer
> Register r9 information: slab kmalloc-2k start c1efd800 pointer offset 0
> size 2048
> Register r10 information: non-slab/vmalloc memory
> Register r11 information: non-slab/vmalloc memory
> Register r12 information: non-paged memory
> Process swapper/0 (pid: 1, stack limit = 0x(ptrval))
> Stack: (0xc1cafcb8 to 0xc1cb0000)
> ...
>   exynos_dsi_bind from component_bind_all+0x130/0x290
>   component_bind_all from exynos_drm_bind+0xe8/0x194
>   exynos_drm_bind from try_to_bring_up_master+0x208/0x2d0
>   try_to_bring_up_master from component_master_add_with_match+0xd0/0x104
>   component_master_add_with_match from exynos_drm_platform_probe+0xe8/0x118
>   exynos_drm_platform_probe from platform_probe+0x80/0xc0
>   platform_probe from really_probe+0xfc/0x440
>   really_probe from __driver_probe_device+0xa4/0x204
>   __driver_probe_device from driver_probe_device+0x34/0xd4
>   driver_probe_device from __driver_attach+0x114/0x184
>   __driver_attach from bus_for_each_dev+0x64/0xb0
>   bus_for_each_dev from bus_add_driver+0x170/0x20c
>   bus_add_driver from driver_register+0x78/0x10c
>   driver_register from exynos_drm_init+0xe0/0x14c
>   exynos_drm_init from do_one_initcall+0x6c/0x3a4
>   do_one_initcall from kernel_init_freeable+0x1c4/0x214
>   kernel_init_freeable from kernel_init+0x18/0x12c
>   kernel_init from ret_from_fork+0x14/0x2c
> Exception stack(0xc1caffb0 to 0xc1cafff8)
> ffa0:                                     00000000 00000000 00000000
> 00000000
> ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000
> 00000000
> ffe0: 00000000 00000000 00000000 00000000 00000013 00000000
> Code: e5904040 e1a00002 e3a02002 e1a01004 (e5945048)
> ---[ end trace 0000000000000000 ]---
> Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
> CPU1: stopping
> CPU: 1 PID: 0 Comm: swapper/1 Tainted: G      D
> 5.17.0-rc2-00577-g22e968113668-dirty #11635
> Hardware name: Samsung Exynos (Flattened Device Tree)
>   unwind_backtrace from show_stack+0x10/0x14
>   show_stack from dump_stack_lvl+0x58/0x70
>   dump_stack_lvl from do_handle_IPI+0x2ec/0x36c
>   do_handle_IPI from ipi_handler+0x18/0x20
>   ipi_handler from handle_percpu_devid_irq+0xd0/0x394
>   handle_percpu_devid_irq from generic_handle_domain_irq+0x44/0x88
>   generic_handle_domain_irq from gic_handle_irq+0x88/0xac
>   gic_handle_irq from generic_handle_arch_irq+0x58/0x78
>   generic_handle_arch_irq from __irq_svc+0x54/0x88
> Exception stack(0xc1cd1f48 to 0xc1cd1f90)
> 1f40:                   00000001 c0eff5a4 00000001 c011ca80 c1208f0c
> c1353420
> 1f60: 00000000 c1d8d000 00000000 c0f34234 c1d8d000 00000000 c0eeee98
> c1cd1f98
> 1f80: c0109144 c0109148 20000013 ffffffff
>   __irq_svc from arch_cpu_idle+0x40/0x44
>   arch_cpu_idle from default_idle_call+0x74/0x2c4
>   default_idle_call from do_idle+0x1cc/0x284
>   do_idle from cpu_startup_entry+0x18/0x1c
>   cpu_startup_entry from 0x401018b4
> ---[ end Kernel panic - not syncing: Attempted to kill init!
> exitcode=0x0000000b ]---
>
>
> I will try to take a look into this later in the evening.
>
>
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
>