| Message ID | 20230427142934.55435-1-francesco@dolcini.it (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/bridge: tc358768: various fixes on PLL calculation and DSI timings | expand |
From: Robert Foss <rfoss@kernel.org> On Thu, 27 Apr 2023 16:29:25 +0200, Francesco Dolcini wrote: > From: Francesco Dolcini <francesco.dolcini@toradex.com> > > This series includes multiple fixes on the tc358768 parallel RGB to DSI driver. > > With the following changes I am able to have a stable display output using a TI > SN65DSI83 (DSI-LVDS bridge) and a 1280 x 800 LVDS display panel and the > register values are coherent with Toshiba documentation and configuration > spreadsheet, I was not able to test any other display sink. > > [...] Applied, thanks! [1/9] drm/bridge: tc358768: always enable HS video mode https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ee18698e212b [2/9] drm/bridge: tc358768: fix PLL parameters computation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ee18698e212b [3/9] drm/bridge: tc358768: fix PLL target frequency https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ee18698e212b [4/9] drm/bridge: tc358768: fix TCLK_ZEROCNT computation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ee18698e212b [5/9] drm/bridge: tc358768: fix TCLK_TRAILCNT computation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ee18698e212b [6/9] drm/bridge: tc358768: fix THS_ZEROCNT computation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=77a089328da7 [7/9] drm/bridge: tc358768: fix TXTAGOCNT computation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=3666aad8185a [8/9] drm/bridge: tc358768: fix THS_TRAILCNT computation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=bac7842cd179 [9/9] drm/bridge: tc358768: remove unused variable https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e4a5e4442a80 Rob
From: Francesco Dolcini <francesco.dolcini@toradex.com> This series includes multiple fixes on the tc358768 parallel RGB to DSI driver. With the following changes I am able to have a stable display output using a TI SN65DSI83 (DSI-LVDS bridge) and a 1280 x 800 LVDS display panel and the register values are coherent with Toshiba documentation and configuration spreadsheet, I was not able to test any other display sink. = DSI Video Mode = The driver uses the MIPI_DSI_MODE_LPM flag not correctly, because of that no HS Video is sent at all when this flag is set by the DSI slave. = DSI Timing Parameters = Multiple DSI timing parameters are not correct and this was leading to black or not stable images on some display output. The new formulas were verified with the datasheet and a configuration spread sheet from Toshiba. I did split the change in multiple commits, I can squash all of them together if this is considered better for any reason, including bisect-ability. = PLL computation = Two issues on the PLL computation, one is a required fix to have the bridge working when the parallel RGB input width is not 24, the second one is just following a prescription from the Toshiba documentation. In my test it was not making any difference. Francesco Dolcini (9): drm/bridge: tc358768: always enable HS video mode drm/bridge: tc358768: fix PLL parameters computation drm/bridge: tc358768: fix PLL target frequency drm/bridge: tc358768: fix TCLK_ZEROCNT computation drm/bridge: tc358768: fix TCLK_TRAILCNT computation drm/bridge: tc358768: fix THS_ZEROCNT computation drm/bridge: tc358768: fix TXTAGOCNT computation drm/bridge: tc358768: fix THS_TRAILCNT computation drm/bridge: tc358768: remove unused variable drivers/gpu/drm/bridge/tc358768.c | 53 +++++++++++++++++-------------- 1 file changed, 30 insertions(+), 23 deletions(-)