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[v2,0/4] Improvements to GuC error capture

Message ID 20230428185636.457407-1-John.C.Harrison@Intel.com (mailing list archive)
Headers show
Series Improvements to GuC error capture | expand

Message

John Harrison April 28, 2023, 6:56 p.m. UTC 
From: John Harrison <John.C.Harrison@Intel.com>

The GuC error capture list creation was including Gen8 registers on Xe
platforms. While fixing that, it was noticed that there were other
issues. The platform naming was wrong, the naming of lists was
misleading, the steered register code was duplicated and steered
registers were not included on all supported platforms.

Separately, it was noticed that the capture list search was broken for
virtual engines. So fix that up too.

v2: Swuash the split patches into a single patch ready for merge.
Also include an extra patch about capture lists and virtual engines.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>


John Harrison (4):
  drm/i915/guc: Don't capture Gen8 regs on Xe devices
  drm/i915/guc: Consolidate duplicated capture list code
  drm/i915/guc: Capture list naming clean up
  drm/i915/guc: Fix error capture for virtual engines

 .../gpu/drm/i915/gt/uc/intel_guc_capture.c    | 242 ++++++++----------
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h    |   3 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  32 ++-
 drivers/gpu/drm/i915/i915_gpu_error.c         |  11 +-
 4 files changed, 149 insertions(+), 139 deletions(-)