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[0/5] accel/ivpu: Update MMU code

Message ID 20230518131605.650622-1-stanislaw.gruszka@linux.intel.com (mailing list archive)
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Series accel/ivpu: Update MMU code | expand

Message

Stanislaw Gruszka May 18, 2023, 1:16 p.m. UTC
Update MMU code in order to support future generations of hardware.

Karol Wachowski (5):
  accel/ivpu: Remove configuration of MMU TBU1 and TBU3
  accel/ivpu: Add MMU support for 4 level page mappings
  accel/ivpu: Make DMA bit mask HW specific
  accel/ivpu: Rename and cleanup MMU600 page tables
  accel/ivpu: Mark 64 kB contiguous areas as contiguous in PTEs

 drivers/accel/ivpu/ivpu_drv.c         |   8 +-
 drivers/accel/ivpu/ivpu_drv.h         |   1 +
 drivers/accel/ivpu/ivpu_hw.h          |   1 +
 drivers/accel/ivpu/ivpu_hw_mtl.c      |  19 +-
 drivers/accel/ivpu/ivpu_mmu.c         |  14 +-
 drivers/accel/ivpu/ivpu_mmu_context.c | 294 ++++++++++++++++++--------
 drivers/accel/ivpu/ivpu_mmu_context.h |   9 +-
 7 files changed, 235 insertions(+), 111 deletions(-)