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[v4,00/12] drm/bridge: tc358768: Fixes and timings improvements

Message ID 20230906-tc358768-v4-0-31725f008a50@ideasonboard.com (mailing list archive)
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Series drm/bridge: tc358768: Fixes and timings improvements | expand

Message

Tomi Valkeinen Sept. 6, 2023, 6:50 a.m. UTC
This series contains various fixes and cleanups for TC358768. The target
of this work is to get TC358768 working on Toradex's AM62 based board,
which has the following display pipeline:

AM62 DPI -> TC358768 -> LT8912B -> HDMI connector

The main thing the series does is to improve the DSI HSW, HFP and VSDly
calculations.

 Tomi

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
---
Changes in v4:
- Add Tested-by tags
- Fix a typo in a comment 
- Link to v3: https://lore.kernel.org/r/20230822-tc358768-v3-0-c82405dac0c1@ideasonboard.com

Changes in v3:
- Add Peter's reviewed-bys
- Move "Default to positive h/v syncs" earlier in the series to avoid
  regression in the middle of the series
- Link to v2: https://lore.kernel.org/r/20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com

Changes in v2:
- Add "drm/tegra: rgb: Parameterize V- and H-sync polarities" so that
  Tegra can configure the polarities correctly.
- Add "drm/bridge: tc358768: Default to positive h/v syncs" as we don't
  (necessarily) have the polarities set in the mode.
- Drop "drm/bridge: tc358768: Add DRM_BRIDGE_ATTACH_NO_CONNECTOR
  support" as it's not needed for DRM_BRIDGE_ATTACH_NO_CONNECTOR
  support.
- Link to v1: https://lore.kernel.org/r/20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com

---
Thierry Reding (1):
      drm/tegra: rgb: Parameterize V- and H-sync polarities

Tomi Valkeinen (11):
      drm/bridge: tc358768: Fix use of uninitialized variable
      drm/bridge: tc358768: Default to positive h/v syncs
      drm/bridge: tc358768: Fix bit updates
      drm/bridge: tc358768: Cleanup PLL calculations
      drm/bridge: tc358768: Use struct videomode
      drm/bridge: tc358768: Print logical values, not raw register values
      drm/bridge: tc358768: Use dev for dbg prints, not priv->dev
      drm/bridge: tc358768: Rename dsibclk to hsbyteclk
      drm/bridge: tc358768: Clean up clock period code
      drm/bridge: tc358768: Fix tc358768_ns_to_cnt()
      drm/bridge: tc358768: Attempt to fix DSI horizontal timings

 drivers/gpu/drm/bridge/tc358768.c | 381 ++++++++++++++++++++++++++++----------
 drivers/gpu/drm/tegra/rgb.c       |  16 +-
 2 files changed, 295 insertions(+), 102 deletions(-)
---
base-commit: f45acf7acf75921c0409d452f0165f51a19a74fd
change-id: 20230804-tc358768-1b6949ef2e3d

Best regards,

Comments

Tomi Valkeinen Sept. 18, 2023, 4:46 a.m. UTC | #1
Hi bridge maintainers!

On 06/09/2023 09:50, Tomi Valkeinen wrote:
> This series contains various fixes and cleanups for TC358768. The target
> of this work is to get TC358768 working on Toradex's AM62 based board,
> which has the following display pipeline:
> 
> AM62 DPI -> TC358768 -> LT8912B -> HDMI connector
> 
> The main thing the series does is to improve the DSI HSW, HFP and VSDly
> calculations.

Any comments on this series?

  Tomi

>   Tomi
> 
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
> ---
> Changes in v4:
> - Add Tested-by tags
> - Fix a typo in a comment
> - Link to v3: https://lore.kernel.org/r/20230822-tc358768-v3-0-c82405dac0c1@ideasonboard.com
> 
> Changes in v3:
> - Add Peter's reviewed-bys
> - Move "Default to positive h/v syncs" earlier in the series to avoid
>    regression in the middle of the series
> - Link to v2: https://lore.kernel.org/r/20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com
> 
> Changes in v2:
> - Add "drm/tegra: rgb: Parameterize V- and H-sync polarities" so that
>    Tegra can configure the polarities correctly.
> - Add "drm/bridge: tc358768: Default to positive h/v syncs" as we don't
>    (necessarily) have the polarities set in the mode.
> - Drop "drm/bridge: tc358768: Add DRM_BRIDGE_ATTACH_NO_CONNECTOR
>    support" as it's not needed for DRM_BRIDGE_ATTACH_NO_CONNECTOR
>    support.
> - Link to v1: https://lore.kernel.org/r/20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com
> 
> ---
> Thierry Reding (1):
>        drm/tegra: rgb: Parameterize V- and H-sync polarities
> 
> Tomi Valkeinen (11):
>        drm/bridge: tc358768: Fix use of uninitialized variable
>        drm/bridge: tc358768: Default to positive h/v syncs
>        drm/bridge: tc358768: Fix bit updates
>        drm/bridge: tc358768: Cleanup PLL calculations
>        drm/bridge: tc358768: Use struct videomode
>        drm/bridge: tc358768: Print logical values, not raw register values
>        drm/bridge: tc358768: Use dev for dbg prints, not priv->dev
>        drm/bridge: tc358768: Rename dsibclk to hsbyteclk
>        drm/bridge: tc358768: Clean up clock period code
>        drm/bridge: tc358768: Fix tc358768_ns_to_cnt()
>        drm/bridge: tc358768: Attempt to fix DSI horizontal timings
> 
>   drivers/gpu/drm/bridge/tc358768.c | 381 ++++++++++++++++++++++++++++----------
>   drivers/gpu/drm/tegra/rgb.c       |  16 +-
>   2 files changed, 295 insertions(+), 102 deletions(-)
> ---
> base-commit: f45acf7acf75921c0409d452f0165f51a19a74fd
> change-id: 20230804-tc358768-1b6949ef2e3d
> 
> Best regards,
Robert Foss Sept. 20, 2023, noon UTC | #2
On Wed, 06 Sep 2023 09:50:47 +0300, Tomi Valkeinen wrote:
> This series contains various fixes and cleanups for TC358768. The target
> of this work is to get TC358768 working on Toradex's AM62 based board,
> which has the following display pipeline:
> 
> AM62 DPI -> TC358768 -> LT8912B -> HDMI connector
> 
> The main thing the series does is to improve the DSI HSW, HFP and VSDly
> calculations.
> 
> [...]

I fixed formatting warnings.

Applied, thanks!

[01/12] drm/tegra: rgb: Parameterize V- and H-sync polarities
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=1716b1891e1d
[02/12] drm/bridge: tc358768: Fix use of uninitialized variable
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=a2d9036615f0
[03/12] drm/bridge: tc358768: Default to positive h/v syncs
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=aa23099f4733
[04/12] drm/bridge: tc358768: Fix bit updates
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=66962d5c3c51
[05/12] drm/bridge: tc358768: Cleanup PLL calculations
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=1e08e78871df
[06/12] drm/bridge: tc358768: Use struct videomode
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e5fb21678136
[07/12] drm/bridge: tc358768: Print logical values, not raw register values
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=013ea98cdfcc
[08/12] drm/bridge: tc358768: Use dev for dbg prints, not priv->dev
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=89cfd50e13f1
[09/12] drm/bridge: tc358768: Rename dsibclk to hsbyteclk
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=699cf62a7d45
[10/12] drm/bridge: tc358768: Clean up clock period code
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=b3aa7b34924a
[11/12] drm/bridge: tc358768: Fix tc358768_ns_to_cnt()
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=f1dabbe64506
[12/12] drm/bridge: tc358768: Attempt to fix DSI horizontal timings
        https://cgit.freedesktop.org/drm/drm-misc/commit/?id=9fc75c40faa2



Rob