[v4,0/3] drm/nouveau: Add drm_panic support for nv50+

Message

Jocelyn Falempe Oct. 22, 2024, 6:39 p.m. UTC

This series adds basic drm_panic support for nouveau.
I've tested on GTX1650 (Turing), GeForce GT 1030 (Pascal) and
Geforce 8800 GTS (Tesla), running Gnome/Wayland desktop, and in VT.

It should work on other nv50+ cards, but I didn't test them.

To test it, you need to build your kernel with CONFIG_DRM_PANIC=y, and run:

echo c > /proc/sysrq-trigger

or you can enable CONFIG_DRM_PANIC_DEBUG and run:

echo 1 > /sys/kernel/debug/dri/0/drm_panic_plane_0

v2:
 * Rebase and drop already merged patches.
 * Rework the tiling algorithm, using "swizzle" to compute the offset
   inside the block.
   
v3:
 * Fix support for Tesla GPU, which have simpler tiling.
 * Drop "add a private pointer to struct drm_scanout_buffer".
 * Use nouveau_framebuffer_get_layout() to get the tiling parameters.
 * Have 2 set_pixel() functions, depending on GPU family.
 
v4:
 * Refactor and move the tiling code from nouveau_display.c to dispnv50/tile.h, so that
 in can be re-used by drm_panic. (Lyude)
 * Refactor get_scanout_buffer() to use the new dispnv50/tile.h
 * use drm_warn() instead of pr_warn() in get_scanout_buffer
 
Jocelyn Falempe (3):
  drm/panic: Add ABGR2101010 support
  drm/nouveau/disp: Move tiling functions to dispnv50/tile.h
  drm/nouveau: Add drm_panic support for nv50+

 drivers/gpu/drm/drm_panic.c               |  10 ++
 drivers/gpu/drm/nouveau/dispnv50/tile.h   |  63 +++++++++++
 drivers/gpu/drm/nouveau/dispnv50/wndw.c   | 129 +++++++++++++++++++++-
 drivers/gpu/drm/nouveau/nouveau_display.c |  59 ++--------
 4 files changed, 210 insertions(+), 51 deletions(-)
 create mode 100644 drivers/gpu/drm/nouveau/dispnv50/tile.h


base-commit: 2320c9e6a768d135c7b0039995182bb1a4e4fd22

Comments

Lyude Paul Oct. 31, 2024, 8:29 p.m. UTC | #1

Reviewed-by: Lyude Paul <[e-mail]>

On Tue, 2024-10-22 at 20:39 +0200, Jocelyn Falempe wrote:
> This series adds basic drm_panic support for nouveau.
> I've tested on GTX1650 (Turing), GeForce GT 1030 (Pascal) and
> Geforce 8800 GTS (Tesla), running Gnome/Wayland desktop, and in VT.
> 
> It should work on other nv50+ cards, but I didn't test them.
> 
> To test it, you need to build your kernel with CONFIG_DRM_PANIC=y, and run:
> 
> echo c > /proc/sysrq-trigger
> 
> or you can enable CONFIG_DRM_PANIC_DEBUG and run:
> 
> echo 1 > /sys/kernel/debug/dri/0/drm_panic_plane_0
> 
> v2:
>  * Rebase and drop already merged patches.
>  * Rework the tiling algorithm, using "swizzle" to compute the offset
>    inside the block.
>    
> v3:
>  * Fix support for Tesla GPU, which have simpler tiling.
>  * Drop "add a private pointer to struct drm_scanout_buffer".
>  * Use nouveau_framebuffer_get_layout() to get the tiling parameters.
>  * Have 2 set_pixel() functions, depending on GPU family.
>  
> v4:
>  * Refactor and move the tiling code from nouveau_display.c to dispnv50/tile.h, so that
>  in can be re-used by drm_panic. (Lyude)
>  * Refactor get_scanout_buffer() to use the new dispnv50/tile.h
>  * use drm_warn() instead of pr_warn() in get_scanout_buffer
>  
> Jocelyn Falempe (3):
>   drm/panic: Add ABGR2101010 support
>   drm/nouveau/disp: Move tiling functions to dispnv50/tile.h
>   drm/nouveau: Add drm_panic support for nv50+
> 
>  drivers/gpu/drm/drm_panic.c               |  10 ++
>  drivers/gpu/drm/nouveau/dispnv50/tile.h   |  63 +++++++++++
>  drivers/gpu/drm/nouveau/dispnv50/wndw.c   | 129 +++++++++++++++++++++-
>  drivers/gpu/drm/nouveau/nouveau_display.c |  59 ++--------
>  4 files changed, 210 insertions(+), 51 deletions(-)
>  create mode 100644 drivers/gpu/drm/nouveau/dispnv50/tile.h
> 
> 
> base-commit: 2320c9e6a768d135c7b0039995182bb1a4e4fd22

Jocelyn Falempe Nov. 4, 2024, 11:49 a.m. UTC | #2

On 31/10/2024 21:29, Lyude Paul wrote:
> Reviewed-by: Lyude Paul <[e-mail]>
> 

I just pushed it to drm-misc-next.

Thanks & Best regards,