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bh=+m53FldsUXI6xvpMZbOa1jopdbOqudxd79IuAUX0dCU=; b=CPjYt6DTSWBRNYIA4ecT/iQeq7LiswnW0wJMMRuTemvDt9buIl5o6MqErx4UvsJNvcDbLb oPC0vCZzswCPZLAg== Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 483AC13332; Fri, 17 Jan 2025 10:34:55 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id jCZKEE8yimewLAAAD6G6ig (envelope-from ); Fri, 17 Jan 2025 10:34:55 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 0/8] drm/ast: Reorganize TX-chip detection and init Date: Fri, 17 Jan 2025 11:29:05 +0100 Message-ID: <20250117103450.28692-1-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.de:mid]; RCVD_TLS_ALL(0.00)[] X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Detection and initialization of TX chips is mixed up with each other and other device-probing code. Move it into one place and reorganize branches by Aspeed Gen. This series is another step towards separating the TX code from the rest of the driver and making each hardware gen self-contained. Tested on AST 1100, 2300, 2500 and 2600. Thomas Zimmermann (8): drm/ast: Detect wide-screen support before creating modeset pipeline drm/ast: Detect DRAM before TX-chip drm/ast: Refactor ast_post_gpu() by Gen drm/ast: Initialize ASTDP in ast_post_gpu() drm/ast: Hide Gens 1 to 3 TX detection in branch drm/ast: Align Gen1 DVO detection to register manual drm/ast: Merge TX-chip detection code for Gen4 and later drm/ast: Only warn about unsupported TX chips on Gen4 and later drivers/gpu/drm/ast/ast_drv.c | 6 +- drivers/gpu/drm/ast/ast_drv.h | 2 +- drivers/gpu/drm/ast/ast_main.c | 113 +++++++++++++++++++-------------- drivers/gpu/drm/ast/ast_post.c | 49 ++++++++++---- drivers/gpu/drm/ast/ast_reg.h | 1 + 5 files changed, 107 insertions(+), 64 deletions(-)