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[0/9] drm/i915/dp: Implement POST_LT_ADJ_REQ

Message ID 20250224172645.15763-1-ville.syrjala@linux.intel.com (mailing list archive)
Headers show
Series drm/i915/dp: Implement POST_LT_ADJ_REQ | expand

Message

Ville Syrjala Feb. 24, 2025, 5:26 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Implement the POST_LT_ADJ_REQ sequence, which is supposed
to be used to further tune the link vswing/pre-emphasis
when TPS4 is not supported.

Unfortunately I don't have any displays/dongles that support
this so I wasn't able to test anything. Hopefully CI has
something...

Ville Syrjälä (9):
  drm/dp: Add definitions for POST_LT_ADJ training sequence
  drm/dp: Add POST_LT_ADJ_REQ helpers
  drm/i915/dp: Clear DPCD training pattern before transmitting the idle
    pattern
  drm/i915/dp: Have intel_dp_get_adjust_train() tell us if anything
    changed
  drm/i915/dp: Implement the POST_LT_ADJ_REQ sequence
  drm/i915/dp: Move intel_dp_training_pattern()
  drm/i915/dp: Implement .set_idle_link_train() for everyone
  drm/i915/dp: Make .set_idle_link_train() mandatory
  hax: drm/i915: Disable TPS4 support to force POST_LT_ADJ_REQ usage

 drivers/gpu/drm/display/drm_dp_helper.c       |   8 +
 drivers/gpu/drm/i915/display/g4x_dp.c         |  33 ++-
 .../drm/i915/display/intel_dp_link_training.c | 267 +++++++++++++-----
 .../drm/i915/display/intel_dp_link_training.h |   4 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   2 +-
 include/drm/display/drm_dp.h                  |   3 +
 include/drm/display/drm_dp_helper.h           |   8 +
 7 files changed, 253 insertions(+), 72 deletions(-)