From patchwork Sun Mar 2 14:09:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Usyskin X-Patchwork-Id: 13997805 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52141C282D1 for ; Sun, 2 Mar 2025 14:20:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CAFB710E149; Sun, 2 Mar 2025 14:20:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="nZKjg75R"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3950510E145; Sun, 2 Mar 2025 14:20:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740925235; x=1772461235; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=gZGTtbqq2qnhVu8l+PwzIYuXEaqfEuYxDLRJMmFSJNw=; b=nZKjg75RxirDUmWY80VSvXH8qnLFDUmKvtgP2OYTzhmPBRCHSverAPSC dcTEHAlbRYj6GrSf7a0gGKMmwebT6greFj+X0UsG6KM9v+QwWIEhojVU4 s56I6F5SvB8k0bZR+SU6BrEbvYtVGtC9zLx84GHhVw+r75NoLtllob1sC 1HWUSnvTqVCeuc4Yr4k38kjxCE1+K6n1kcMpx9nnL4ZLUyWAiAnY8VuBg H/UV/nx9Ezs1VHfnq8q+17tmsUHdOyo0YuEaG9SyKnvVEfpD2LdzfrErn 2SxIhkeNBacDV8dpQbklpi8rpVJZisH86relMa76vi5UaSvGloM6My+Rf g==; X-CSE-ConnectionGUID: uBPNbhZITamBbzAwlg9Z6g== X-CSE-MsgGUID: ASMHfa8YQKOwG2nYzsi/7Q== X-IronPort-AV: E=McAfee;i="6700,10204,11361"; a="67176361" X-IronPort-AV: E=Sophos;i="6.13,327,1732608000"; d="scan'208";a="67176361" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2025 06:20:34 -0800 X-CSE-ConnectionGUID: VwqWPvMQRw+tt9aUceDjUg== X-CSE-MsgGUID: cGXPVdFVSH+PfmZ0qdiszQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,327,1732608000"; d="scan'208";a="122737265" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2025 06:20:28 -0800 From: Alexander Usyskin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Lucas De Marchi , =?utf-8?q?Thomas_Hellstr=C3=B6m?= , Rodrigo Vivi , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , Karthik Poosa Cc: Reuven Abliyev , Oren Weil , linux-mtd@lists.infradead.org, dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Alexander Usyskin Subject: [PATCH v6 00/11] mtd: add driver for Intel discrete graphics Date: Sun, 2 Mar 2025 16:09:10 +0200 Message-ID: <20250302140921.504304-1-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add driver for access to Intel discrete graphics card internal NVM device. Expose device on auxiliary bus by i915 and Xe drivers and provide mtd driver to register this device with MTD framework. This is a rewrite of "drm/i915/spi: spi access for discrete graphics" and "spi: add driver for Intel discrete graphics" series with connection to the Xe driver and splitting the spi driver part to separate module in mtd subsystem. This series intended to be pushed through drm-xe-next. V2: Replace dev_* prints with drm_* prints in drm (xe and i915) patches. Enable NVM device on Battlemage HW (xe driver patch) Fix overwrite register address (xe driver patch) Add Rodrigo's r-b V3: Use devm_pm_runtime_enable to simplify flow. Drop print in i915 unload that was accidentally set as error. Drop HAS_GSC_NVM macro in line with latest Xe changes. Add more Rodrigo's r-b and Miquel's ack. V4: Add patch that always creates mtd master device and adjust mtd-intel-dg power management to use this device. V5: Fix master device creation to accomodate for devices without partitions (create partitoned master in this case) Rebase over latest drm-xe-next Add ack's V6: Fix master device release (use rigth idr in release) Rebase over latest drm-xe-next Grammar and style fixes Alexander Usyskin (11): mtd: core: always create master device mtd: add driver for intel graphics non-volatile memory device mtd: intel-dg: implement region enumeration mtd: intel-dg: implement access functions mtd: intel-dg: register with mtd mtd: intel-dg: align 64bit read and write mtd: intel-dg: wake card on operations drm/i915/nvm: add nvm device for discrete graphics drm/i915/nvm: add support for access mode drm/xe/nvm: add on-die non-volatile memory device drm/xe/nvm: add support for access mode MAINTAINERS | 7 + drivers/gpu/drm/i915/Makefile | 4 + drivers/gpu/drm/i915/i915_driver.c | 6 + drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_nvm.c | 115 ++++ drivers/gpu/drm/i915/intel_nvm.h | 15 + drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 + drivers/gpu/drm/xe/xe_device.c | 5 + drivers/gpu/drm/xe/xe_device_types.h | 6 + drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +- drivers/gpu/drm/xe/xe_nvm.c | 136 +++++ drivers/gpu/drm/xe/xe_nvm.h | 15 + drivers/gpu/drm/xe/xe_pci.c | 6 + drivers/mtd/devices/Kconfig | 11 + drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/mtd_intel_dg.c | 845 ++++++++++++++++++++++++++ drivers/mtd/mtdcore.c | 141 +++-- drivers/mtd/mtdcore.h | 2 +- drivers/mtd/mtdpart.c | 17 +- include/linux/intel_dg_nvm_aux.h | 27 + 22 files changed, 1319 insertions(+), 54 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_nvm.c create mode 100644 drivers/gpu/drm/i915/intel_nvm.h create mode 100644 drivers/gpu/drm/xe/xe_nvm.c create mode 100644 drivers/gpu/drm/xe/xe_nvm.h create mode 100644 drivers/mtd/devices/mtd_intel_dg.c create mode 100644 include/linux/intel_dg_nvm_aux.h