From patchwork Fri Feb 8 11:54:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Guido_G=C3=BCnther?= X-Patchwork-Id: 10802961 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E121C1575 for ; Fri, 8 Feb 2019 11:54:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D35512DE07 for ; Fri, 8 Feb 2019 11:54:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C77892DE10; Fri, 8 Feb 2019 11:54:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9A8062DE07 for ; Fri, 8 Feb 2019 11:54:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DD6FF6EDA7; Fri, 8 Feb 2019 11:54:35 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from honk.sigxcpu.org (honk.sigxcpu.org [24.134.29.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2D4A06EDA0 for ; Fri, 8 Feb 2019 11:54:32 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id CC97CFB03; Fri, 8 Feb 2019 12:54:30 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id M288rw8xnDf3; Fri, 8 Feb 2019 12:54:28 +0100 (CET) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id 8181A43F22; Fri, 8 Feb 2019 12:54:27 +0100 (CET) From: =?utf-8?q?Guido_G=C3=BCnther?= To: Maxime Ripard , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, Robert Chiras , Sam Ravnborg , Fabio Estevam Subject: [PATCH v3 0/3] Mixel DPHY support for i.MX8 Date: Fri, 8 Feb 2019 12:54:24 +0100 Message-Id: X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This adds initial support for the Mixel IP based mipi dphy as found on i.MX8 processors. It has support for the i.MX8MQ, support for other variants can be added - once the necessary parts are in - via the provided devdata. The driver is somewhat based on what's found in NXPs BSP. Documentation on the DPHY's registers is currently thin in the i.MX8 reference manuals (even on the i.MX8QXP form 11/18) so most of the values were taken from existing drivers. Newer NXP drivers have a bit more details so where possible the timings are calculated and validated. This is based on linux-next as of 2019-01-25 and Maxime Ripard's dphy configuration helper which have now been merged. To get DSI working on the imx8MQ there's a driver for the nwl dsi host controller missing which I intend to look at too. Changes from v2 * As per review comments from Fabio Estevam * KConfig: select REGMAP_MMIO * Drop phy_read * Don't make phy_write inline * Remove duplicate debugging output * Comment style and typo fixes * Add #defines's for PLL lock timing values * Return correct error value when PLL fails to lock * Check error when enabling clock * Use devm_ioremap_resource * As per review comments from Robert Chiras * Deassert PD_DPHY after PLL lock (as per mixel ref manual) * Assert PD_{DPHY,PLL} before power on (as per mixel ref manual)manual * Add exit phy_op to reset CN/CM/CO Changes from v1 * As per review comments from Fabio Estevam * Kconfig: tristate mixel dphy support. * Drop unused 'ret' in mixel_dphy_ref_power_off. * Match values of DPHY_RXL{PRP,DRP} to those of https://source.codeaurora.org/external/imx/linux-imx/log/?h=imx_4.14.78_1.0.0_ga The previous values were based on 4.9. * Use resource size on devm_ioremap, we have that in dt already. * Use regmap so it's simple to dump the registers. * Use regmap_read_poll_timeout instead of open coded loop. * Add undocumented rxhs_settle register * As per review comments from Sam Ravnborg * Move driver to d/phy/freescale/ * Move SPDX-License-Identifier to top of file. * Drop '/* #define DEBUG 1 */'. * Use GPL-2.0+ since the vendor driver uses that as well. * Drop the mutex, register access is now protected by regmap. * Fix various style / indentation issues. * Check for register read, write and ioremap errors * Improve phy timing calculations * Use LP clock rate where sensible, check for errors * Use ad hoc forumulas for timings involving hs clock * Switch from dphy_ops to devdata. Other i.MX8 variants differ in register layout too * Add Mixel Inc to vendor-prefixes.txt Guido Günther (3): dt-bindings: Add vendor prefix for Mixel Inc dt-bindings: phy: Add documentation for mixel dphy phy: Add driver for mixel dphy found on imx8 .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 + .../devicetree/bindings/vendor-prefixes.txt | 1 + drivers/phy/freescale/Kconfig | 10 + drivers/phy/freescale/Makefile | 1 + .../phy/freescale/phy-fsl-imx8-mipi-dphy.c | 499 ++++++++++++++++++ 5 files changed, 540 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt create mode 100644 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c