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Ip=[165.204.84.17]; Helo=[SATLEXCHOV01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3422 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=p621iuph0vsvd4Mm9f01nW7utFUORSyluAkxanbCAvo=; b=ljlBpumeCWx+Ch6/Z8saTvZqJr+BRtXqgeuWrLXqGYDQH3MbY41LEQProds65KPd6aNTEHnOYwwTc9Fp78v1nzu1LuRUwYS2Vyu8wUjD2P/2JeoqhEi5bURCV6mLKqivQo3N0OGgaaILwTAx1zQH4atOhe80aT2oba99PbGnpw8= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mikita Lipski , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Mikita Lipski This set of patches is a continuation of DSC enablement patches for AMDGPU. This set enables DSC on MST. First 3 patches add atomic check functionality to encoder and connector to allocate and release VCPI slots on each state atomic check. These changes utilize newly added drm_mst_helper functions for better tracking of VCPI slots. Other 12 patches have been introduced in multiple iterations to the mailing list before. These patches were developed by David Francis as part of his work on DSC. David Francis (12): drm/dp_mst: Add PBN calculation for DSC modes drm/dp_mst: Parse FEC capability on MST ports drm/dp_mst: Add MST support to DP DPCD R/W functions drm/dp_mst: Fill branch->num_ports drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux drm/dp_mst: Add new quirk for Synaptics MST hubs drm/amd/display: Use correct helpers to compute timeslots drm/amd/display: Initialize DSC PPS variables to 0 drm/amd/display: Validate DSC caps on MST endpoints drm/amd/display: Write DSC enable to MST DPCD drm/amd/display: MST DSC compute fair share drm/amd/display: Trigger modesets on MST DSC connectors Mikita Lipski (3): drm/amdgpu: Add encoder atomic check drm/amdgpu: Add connector atomic check drm/amdgpu: validate mst topology in atomic check .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 153 ++++++ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 37 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 451 +++++++++++++++++- .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 4 + .../drm/amd/display/dc/core/dc_link_hwss.c | 3 + .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 + drivers/gpu/drm/drm_dp_aux_dev.c | 12 +- drivers/gpu/drm/drm_dp_helper.c | 34 +- drivers/gpu/drm/drm_dp_mst_topology.c | 174 ++++++- drivers/gpu/drm/i915/intel_dp_mst.c | 3 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- include/drm/drm_dp_helper.h | 7 + include/drm/drm_dp_mst_helper.h | 8 +- 17 files changed, 866 insertions(+), 39 deletions(-)