From patchwork Thu Feb 11 22:16:36 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 78843 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1C7MHjn020271 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 12 Feb 2010 07:22:54 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1NfhKk-0005qy-G8; Thu, 11 Feb 2010 22:16:26 +0000 Received: from sfi-mx-1.v28.ch3.sourceforge.com ([172.29.28.121] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1NfhKg-0005qj-HV for dri-devel@lists.sourceforge.net; Thu, 11 Feb 2010 22:16:22 +0000 Received-SPF: pass (sfi-mx-1.v28.ch3.sourceforge.com: domain of gmail.com designates 74.125.78.148 as permitted sender) client-ip=74.125.78.148; envelope-from=zajec5@gmail.com; helo=ey-out-1920.google.com; Received: from ey-out-1920.google.com ([74.125.78.148]) by sfi-mx-1.v28.ch3.sourceforge.com with esmtp (Exim 4.69) id 1NfhKd-00064M-JG for dri-devel@lists.sourceforge.net; Thu, 11 Feb 2010 22:16:22 +0000 Received: by ey-out-1920.google.com with SMTP id 4so385362eyg.40 for ; Thu, 11 Feb 2010 14:16:13 -0800 (PST) Received: by 10.213.1.19 with SMTP id 19mr443879ebd.21.1265926573170; Thu, 11 Feb 2010 14:16:13 -0800 (PST) Received: from localhost.localdomain (c3-107.icpnet.pl [62.21.3.107]) by mx.google.com with ESMTPS id 13sm1842230ewy.13.2010.02.11.14.16.10 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 11 Feb 2010 14:16:11 -0800 (PST) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: dri-devel@lists.sourceforge.net, Dave Airlie Subject: [PATCH] drm/radeon/kms: accept slightly overclocked power modes Date: Thu, 11 Feb 2010 23:16:36 +0100 Message-Id: <1265926596-6954-2-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.6.4.2 MIME-Version: 1.0 X-Spam-Score: -0.8 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record -0.0 DKIM_VERIFIED Domain Keys Identified Mail: signature passes verification 0.0 DKIM_SIGNED Domain Keys Identified Mail: message has a signature 0.7 AWL AWL: From: address is in the auto white-list X-Headers-End: 1NfhKd-00064M-JG X-BeenThere: dri-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 12 Feb 2010 07:22:54 +0000 (UTC) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index d3040e2..1d31677 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -661,6 +661,11 @@ struct radeon_power_state { bool voltage_drop_active; }; +/* + * Some modes are overclocked by very low value, accept them + */ +#define RADEON_MODE_OVERCLOCK_MARGIN 500 /* 5 MHz */ + struct radeon_pm { struct mutex mutex; struct delayed_work idle_work; diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 4f7dbce..731210b 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c @@ -1463,9 +1463,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) continue; /* skip overclock modes for now */ if ((rdev->pm.power_state[state_index].clock_info[0].mclk > - rdev->clock.default_mclk) || + rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) || (rdev->pm.power_state[state_index].clock_info[0].sclk > - rdev->clock.default_sclk)) + rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN)) continue; rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = power_info->info.asPowerPlayInfo[i].ucNumPciELanes; @@ -1528,9 +1528,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) continue; /* skip overclock modes for now */ if ((rdev->pm.power_state[state_index].clock_info[0].mclk > - rdev->clock.default_mclk) || + rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) || (rdev->pm.power_state[state_index].clock_info[0].sclk > - rdev->clock.default_sclk)) + rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN)) continue; rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = power_info->info_2.asPowerPlayInfo[i].ucNumPciELanes; @@ -1597,9 +1597,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) continue; /* skip overclock modes for now */ if ((rdev->pm.power_state[state_index].clock_info[0].mclk > - rdev->clock.default_mclk) || + rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) || (rdev->pm.power_state[state_index].clock_info[0].sclk > - rdev->clock.default_sclk)) + rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN)) continue; rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = power_info->info_3.asPowerPlayInfo[i].ucNumPciELanes; @@ -1693,7 +1693,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) continue; /* skip overclock modes for now */ if (rdev->pm.power_state[state_index].clock_info[mode_index].sclk > - rdev->clock.default_sclk) + rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN) continue; rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = VOLTAGE_SW; @@ -1720,9 +1720,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) continue; /* skip overclock modes for now */ if ((rdev->pm.power_state[state_index].clock_info[mode_index].mclk > - rdev->clock.default_mclk) || + rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) || (rdev->pm.power_state[state_index].clock_info[mode_index].sclk > - rdev->clock.default_sclk)) + rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN)) continue; rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = VOLTAGE_SW; diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 9989d22..5ef791b 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c @@ -2374,9 +2374,9 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) goto default_mode; /* skip overclock modes for now */ if ((rdev->pm.power_state[state_index].clock_info[0].mclk > - rdev->clock.default_mclk) || + rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) || (rdev->pm.power_state[state_index].clock_info[0].sclk > - rdev->clock.default_sclk)) + rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN)) goto default_mode; rdev->pm.power_state[state_index].type = POWER_STATE_TYPE_BATTERY;