From patchwork Thu Feb 25 04:23:31 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Turner X-Patchwork-Id: 81887 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1P4ODue006001 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 25 Feb 2010 04:24:51 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1NkVFh-0001Xf-Gu; Thu, 25 Feb 2010 04:23:05 +0000 Received: from sfi-mx-1.v28.ch3.sourceforge.com ([172.29.28.121] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1NkVFg-0001XU-1V for dri-devel@lists.sourceforge.net; Thu, 25 Feb 2010 04:23:04 +0000 Received-SPF: pass (sfi-mx-1.v28.ch3.sourceforge.com: domain of gmail.com designates 209.85.210.178 as permitted sender) client-ip=209.85.210.178; envelope-from=mattst88@gmail.com; helo=mail-yx0-f178.google.com; Received: from mail-yx0-f178.google.com ([209.85.210.178]) by sfi-mx-1.v28.ch3.sourceforge.com with esmtp (Exim 4.69) id 1NkVFf-0005Le-6Q for dri-devel@lists.sourceforge.net; Thu, 25 Feb 2010 04:23:03 +0000 Received: by yxe8 with SMTP id 8so1381129yxe.28 for ; Wed, 24 Feb 2010 20:22:57 -0800 (PST) Received: by 10.101.5.15 with SMTP id h15mr779401ani.170.1267071777624; Wed, 24 Feb 2010 20:22:57 -0800 (PST) Received: from mattst88@gmail.com ([204.84.232.251]) by mx.google.com with ESMTPS id 23sm2287841ywh.45.2010.02.24.20.22.55 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 24 Feb 2010 20:22:56 -0800 (PST) Received: by mattst88@gmail.com (sSMTP sendmail emulation); Wed, 24 Feb 2010 23:23:46 -0500 From: Matt Turner To: dri-devel@lists.sourceforge.net Subject: [PATCH] drm/radeon: use ALIGN instead of open coding it Date: Wed, 24 Feb 2010 23:23:31 -0500 Message-Id: <1267071811-23063-1-git-send-email-mattst88@gmail.com> X-Mailer: git-send-email 1.6.4.4 X-Spam-Score: -0.2 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain 1.1 RCVD_IN_SORBS_WEB RBL: SORBS: sender is a abuseable web server [204.84.232.251 listed in dnsbl.sorbs.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 DKIM_VERIFIED Domain Keys Identified Mail: signature passes verification 0.0 DKIM_SIGNED Domain Keys Identified Mail: message has a signature 0.2 AWL AWL: From: address is in the auto white-list X-Headers-End: 1NkVFf-0005Le-6Q Cc: Alex Deucher , Dave Airlie , Jerome Glisse X-BeenThere: dri-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 25 Feb 2010 04:24:51 +0000 (UTC) diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c index 5ea4323..f4fb88e 100644 --- a/drivers/gpu/drm/radeon/r600_blit.c +++ b/drivers/gpu/drm/radeon/r600_blit.c @@ -49,7 +49,7 @@ set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 RING_LOCALS; DRM_DEBUG("\n"); - h = (h + 7) & ~7; + h = ALIGN(h, 8); if (h < 8) h = 8; diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 446b765..ddea43a 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c @@ -25,7 +25,7 @@ set_render_target(struct radeon_device *rdev, int format, u32 cb_color_info; int pitch, slice; - h = (h + 7) & ~7; + h = ALIGN(h, 8); if (h < 8) h = 8; @@ -396,7 +396,7 @@ set_default_state(struct radeon_device *rdev) NUM_ES_STACK_ENTRIES(num_es_stack_entries)); /* emit an IB pointing at default state */ - dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf; + dwords = ALIGN(rdev->r600_blit.state_len, 0x10); gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset; radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);