[2/2] drm/radeon/kms: ppll stability fixes for rs690

Commit Message

Alex Deucher Jan. 10, 2011, 5:23 p.m. UTC

None

Patch

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index b0ab185..0ed2469 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -524,8 +524,8 @@  static u32 atombios_adjust_pll(struct drm_crtc *crtc,
 		if ((rdev->family == CHIP_RS600) ||
 		    (rdev->family == CHIP_RS690) ||
 		    (rdev->family == CHIP_RS740))
-			pll->flags |= (/*RADEON_PLL_USE_FRAC_FB_DIV |*/
-				       RADEON_PLL_PREFER_CLOSEST_LOWER);
+			pll->flags |= (RADEON_PLL_USE_FRAC_FB_DIV |
+				       RADEON_PLL_PREFER_CLOSEST_HIGHER);
 
 		if (ASIC_IS_DCE32(rdev) && mode->clock > 200000)	/* range limits??? */
 			pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
@@ -578,6 +578,18 @@  static u32 atombios_adjust_pll(struct drm_crtc *crtc,
 				if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
 					pll->flags |= RADEON_PLL_USE_REF_DIV;
 			}
+
+			if ((rdev->family == CHIP_RS600) ||
+			    (rdev->family == CHIP_RS690) ||
+			    (rdev->family == CHIP_RS740)) {
+				/* TMDS on these chips seems to prefer a slightly higher clock and
+				 * even post dividers
+				 */
+				if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
+					adjusted_clock += 50;
+					pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
+				}
+			}
 			break;
 		}
 	}