From patchwork Mon Jan 10 17:23:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 469301 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p0AHOpOq017617 for ; Mon, 10 Jan 2011 17:25:11 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EA2F39E8B1 for ; Mon, 10 Jan 2011 09:24:50 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qy0-f177.google.com (mail-qy0-f177.google.com [209.85.216.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 32FE69E856 for ; Mon, 10 Jan 2011 09:24:02 -0800 (PST) Received: by qyk27 with SMTP id 27so23181330qyk.15 for ; Mon, 10 Jan 2011 09:24:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=ySNmw+ebJeUQOh8fkUhceZZV4BuIPm7i9UWYpOOPf20=; b=hPoXLAh1IcyUkpP/nqwFZ3T3q/yMd1YyGkTIcJ+4TGNoaNTVT+As6wNbzqfS9j9hSZ sRwO8j+Z6OpyJLGKsQXE6uxagp0Cyp3pnmuIx+VC0E4L+nGnl0pct9M/F9qCBKPVJs9S wTn4doPG58NAD47gRrnTyPORIGW1p2cxPkmo8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=g6GFH44sKCd2kFFgpVVjGh7hAC45xkzO9QaaJsq8xZMAp6TuSPIy+cOCTtQfzoCbJ9 OYW9mzmZjR2RfM0BD3bf7F39ZvNhPF6J27W0b8nbt0NHPXW0DAPiyKtnIQk6eXK7/tEy f8Tmla4SnV7/9Y7laMWNd/xHrIIi3oOPs7/XM= Received: by 10.229.81.206 with SMTP id y14mr25533399qck.127.1294680241715; Mon, 10 Jan 2011 09:24:01 -0800 (PST) Received: from localhost.localdomain (static-74-96-105-7.washdc.fios.verizon.net [74.96.105.7]) by mx.google.com with ESMTPS id m14sm17593305qcu.32.2011.01.10.09.24.00 (version=SSLv3 cipher=RC4-MD5); Mon, 10 Jan 2011 09:24:00 -0800 (PST) From: Alex Deucher To: airlied@gmail.com, dri-devel@lists.freedesktop.org Subject: [PATCH 2/2] drm/radeon/kms: ppll stability fixes for rs690 Date: Mon, 10 Jan 2011 12:23:50 -0500 Message-Id: <1294680230-14970-2-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1294680230-14970-1-git-send-email-alexdeucher@gmail.com> References: <1294680230-14970-1-git-send-email-alexdeucher@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 10 Jan 2011 17:25:11 +0000 (UTC) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b0ab185..0ed2469 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -524,8 +524,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, if ((rdev->family == CHIP_RS600) || (rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) - pll->flags |= (/*RADEON_PLL_USE_FRAC_FB_DIV |*/ - RADEON_PLL_PREFER_CLOSEST_LOWER); + pll->flags |= (RADEON_PLL_USE_FRAC_FB_DIV | + RADEON_PLL_PREFER_CLOSEST_HIGHER); if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; @@ -578,6 +578,18 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) pll->flags |= RADEON_PLL_USE_REF_DIV; } + + if ((rdev->family == CHIP_RS600) || + (rdev->family == CHIP_RS690) || + (rdev->family == CHIP_RS740)) { + /* TMDS on these chips seems to prefer a slightly higher clock and + * even post dividers + */ + if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { + adjusted_clock += 50; + pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; + } + } break; } }