@@ -1258,7 +1258,9 @@ static int i915_load_modeset_init(struct drm_device *dev)
if (IS_GEN3(dev) && (I915_READ(ECOSKPD) & ECO_FLIP_DONE))
dev_priv->flip_pending_is_done = true;
- intel_modeset_init(dev);
+ ret = intel_modeset_init(dev);
+ if (ret)
+ goto cleanup_vga_switcheroo;
ret = i915_load_gem_init(dev);
if (ret)
@@ -1303,7 +1303,7 @@ static inline void intel_unregister_dsm_handler(void) { return; }
#endif /* CONFIG_ACPI */
/* modesetting */
-extern void intel_modeset_init(struct drm_device *dev);
+extern int intel_modeset_init(struct drm_device *dev);
extern void intel_modeset_gem_init(struct drm_device *dev);
extern void intel_modeset_cleanup(struct drm_device *dev);
extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
@@ -7517,7 +7517,7 @@ void intel_init_clock_gating(struct drm_device *dev)
}
/* Set up chip specific display functions */
-static void intel_init_display(struct drm_device *dev)
+static int intel_init_display(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -7609,8 +7609,10 @@ static void intel_init_display(struct drm_device *dev)
}
dev_priv->display.init_clock_gating = ivybridge_init_clock_gating;
- } else
- dev_priv->display.update_wm = NULL;
+ } else {
+ DRM_ERROR("Unknown chipset: %04x\n", dev->pci_device);
+ return -ENODEV;
+ }
} else if (IS_PINEVIEW(dev)) {
if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev),
dev_priv->is_ddr3,
@@ -7656,6 +7658,8 @@ static void intel_init_display(struct drm_device *dev)
else
dev_priv->display.get_fifo_size = i830_get_fifo_size;
}
+
+ return 0;
}
/*
@@ -7741,10 +7745,10 @@ static void i915_disable_vga(struct drm_device *dev)
POSTING_READ(vga_reg);
}
-void intel_modeset_init(struct drm_device *dev)
+int intel_modeset_init(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
+ int i, ret;
drm_mode_config_init(dev);
@@ -7755,7 +7759,9 @@ void intel_modeset_init(struct drm_device *dev)
intel_init_quirks(dev);
- intel_init_display(dev);
+ ret = intel_init_display(dev);
+ if (ret)
+ return ret;
if (IS_GEN2(dev)) {
dev->mode_config.max_width = 2048;
@@ -7793,6 +7799,8 @@ void intel_modeset_init(struct drm_device *dev)
INIT_WORK(&dev_priv->idle_work, intel_idle_update);
setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,
(unsigned long)dev);
+
+ return 0;
}
void intel_modeset_gem_init(struct drm_device *dev)