diff mbox

[21/51] drm/i915: Implement execbuffer wait for all planes

Message ID 1351188354-24233-22-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjala Oct. 25, 2012, 6:05 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add the MI_WAIT_FOR_EVENT bits for sprites, and fix up the whole thing
for IVB which moved most of the bits around.

Not tested at all!

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   44 +++++++++++++++++++++++++--
 drivers/gpu/drm/i915/i915_reg.h            |    9 ++++++
 2 files changed, 49 insertions(+), 4 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 3eea143..cb4d9f7 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -625,10 +625,46 @@  i915_gem_execbuffer_wait_for_flips(struct intel_ring_buffer *ring, u32 flips)
 		if (((flips >> plane) & 1) == 0)
 			continue;
 
-		if (plane)
-			flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
-		else
-			flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
+		if (IS_GEN7(ring->dev)) {
+			switch (plane) {
+			case 0:
+				flip_mask = MI_WAIT_FOR_PLANE_A_FLIP_IVB;
+				break;
+			case 1:
+				flip_mask = MI_WAIT_FOR_PLANE_B_FLIP_IVB;
+				break;
+			case 2:
+				flip_mask = MI_WAIT_FOR_PLANE_C_FLIP_IVB;
+				break;
+			case 16:
+				flip_mask = MI_WAIT_FOR_SPRITE_A_FLIP_IVB;
+				break;
+			case 17:
+				flip_mask = MI_WAIT_FOR_SPRITE_B_FLIP_IVB;
+				break;
+			case 18:
+				flip_mask = MI_WAIT_FOR_SPRITE_C_FLIP_IVB;
+				break;
+			}
+		} else {
+			switch (plane) {
+			case 0:
+				flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
+				break;
+			case 1:
+				flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
+				break;
+			case 2:
+				flip_mask = MI_WAIT_FOR_PLANE_C_FLIP;
+				break;
+			case 16:
+				flip_mask = MI_WAIT_FOR_SPRITE_A_FLIP;
+				break;
+			case 17:
+				flip_mask = MI_WAIT_FOR_SPRITE_B_FLIP;
+				break;
+			}
+		}
 
 		ret = intel_ring_begin(ring, 2);
 		if (ret)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5ea4570..6d09411 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -188,7 +188,16 @@ 
 #define MI_NOOP			MI_INSTR(0, 0)
 #define MI_USER_INTERRUPT	MI_INSTR(0x02, 0)
 #define MI_WAIT_FOR_EVENT       MI_INSTR(0x03, 0)
+#define   MI_WAIT_FOR_SPRITE_C_FLIP_IVB	(1<<20)
+#define   MI_WAIT_FOR_PLANE_C_FLIP_IVB	(1<<15)
+#define   MI_WAIT_FOR_SPRITE_B_FLIP_IVB	(1<<10)
+#define   MI_WAIT_FOR_PLANE_B_FLIP_IVB	(1<<9)
+#define   MI_WAIT_FOR_SPRITE_A_FLIP_IVB	(1<<2)
+#define   MI_WAIT_FOR_PLANE_A_FLIP_IVB	(1<<1)
 #define   MI_WAIT_FOR_OVERLAY_FLIP	(1<<16)
+#define   MI_WAIT_FOR_SPRITE_B_FLIP	(1<<16)
+#define   MI_WAIT_FOR_SPRITE_A_FLIP	(1<<8)
+#define   MI_WAIT_FOR_PLANE_C_FLIP	(1<<8)
 #define   MI_WAIT_FOR_PLANE_B_FLIP      (1<<6)
 #define   MI_WAIT_FOR_PLANE_A_FLIP      (1<<2)
 #define   MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1)