@@ -625,10 +625,46 @@ i915_gem_execbuffer_wait_for_flips(struct intel_ring_buffer *ring, u32 flips)
if (((flips >> plane) & 1) == 0)
continue;
- if (plane)
- flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
- else
- flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
+ if (IS_GEN7(ring->dev)) {
+ switch (plane) {
+ case 0:
+ flip_mask = MI_WAIT_FOR_PLANE_A_FLIP_IVB;
+ break;
+ case 1:
+ flip_mask = MI_WAIT_FOR_PLANE_B_FLIP_IVB;
+ break;
+ case 2:
+ flip_mask = MI_WAIT_FOR_PLANE_C_FLIP_IVB;
+ break;
+ case 16:
+ flip_mask = MI_WAIT_FOR_SPRITE_A_FLIP_IVB;
+ break;
+ case 17:
+ flip_mask = MI_WAIT_FOR_SPRITE_B_FLIP_IVB;
+ break;
+ case 18:
+ flip_mask = MI_WAIT_FOR_SPRITE_C_FLIP_IVB;
+ break;
+ }
+ } else {
+ switch (plane) {
+ case 0:
+ flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
+ break;
+ case 1:
+ flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
+ break;
+ case 2:
+ flip_mask = MI_WAIT_FOR_PLANE_C_FLIP;
+ break;
+ case 16:
+ flip_mask = MI_WAIT_FOR_SPRITE_A_FLIP;
+ break;
+ case 17:
+ flip_mask = MI_WAIT_FOR_SPRITE_B_FLIP;
+ break;
+ }
+ }
ret = intel_ring_begin(ring, 2);
if (ret)
@@ -188,7 +188,16 @@
#define MI_NOOP MI_INSTR(0, 0)
#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
#define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
+#define MI_WAIT_FOR_SPRITE_C_FLIP_IVB (1<<20)
+#define MI_WAIT_FOR_PLANE_C_FLIP_IVB (1<<15)
+#define MI_WAIT_FOR_SPRITE_B_FLIP_IVB (1<<10)
+#define MI_WAIT_FOR_PLANE_B_FLIP_IVB (1<<9)
+#define MI_WAIT_FOR_SPRITE_A_FLIP_IVB (1<<2)
+#define MI_WAIT_FOR_PLANE_A_FLIP_IVB (1<<1)
#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16)
+#define MI_WAIT_FOR_SPRITE_B_FLIP (1<<16)
+#define MI_WAIT_FOR_SPRITE_A_FLIP (1<<8)
+#define MI_WAIT_FOR_PLANE_C_FLIP (1<<8)
#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6)
#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1)