From patchwork Thu Dec 13 17:57:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 1875791 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 655EF3FC81 for ; Thu, 13 Dec 2012 18:01:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 52500E5ED7 for ; Thu, 13 Dec 2012 10:01:34 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-vb0-f49.google.com (mail-vb0-f49.google.com [209.85.212.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B221E5C6C for ; Thu, 13 Dec 2012 09:58:03 -0800 (PST) Received: by mail-vb0-f49.google.com with SMTP id r6so2749637vbi.36 for ; Thu, 13 Dec 2012 09:58:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=KdAwlVFPJsqMOI/tZPttsSlDq6Uz68/61EhiUrBT1zM=; b=oA+Z+NEeeTaMAAaRMg9P2UTZ21QKYwPU82n7bsdUsopNWyMOciUYGJWN6sglSn3sa3 6/NDYgR4BfzH/BPDEwDS8xh3groskFLTeQjWY71tEKqlWQRZL1EzD6agafPr4rcvy5XR r6xGuWmpPA1ENTS2iLuzkcFzflnEtuUd7L894DzCCfSNKFDYuNLXFUm97YC3P2AVoNsA FUt5NMau44LsptpsUwqK8EUUBEJH1pf2NKxtjirIL3CDL9HtEiAhGWcE0X8+41pahKCu xgxGXRoXaiD8L1JpWf2xIpL/IzMUlKvW6y7dH8W8HVm1wGuFYzZz+Gye0fJCKzuQ4qm0 717g== Received: by 10.58.198.135 with SMTP id jc7mr4898495vec.51.1355421483011; Thu, 13 Dec 2012 09:58:03 -0800 (PST) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPS id jx16sm1600635veb.5.2012.12.13.09.58.01 (version=SSLv3 cipher=OTHER); Thu, 13 Dec 2012 09:58:02 -0800 (PST) From: alexdeucher@gmail.com To: airlied@gmail.com, dri-devel@lists.freedesktop.org Subject: [PATCH 4/4] drm/radeon: enable the async DMA rings in the CS ioctl Date: Thu, 13 Dec 2012 12:57:51 -0500 Message-Id: <1355421471-6166-4-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1355421471-6166-1-git-send-email-alexdeucher@gmail.com> References: <1355421471-6166-1-git-send-email-alexdeucher@gmail.com> Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org From: Alex Deucher This enables the functionality added in the previous patches. Userspace acceleration drivers can use the CS ioctl to submit command buffers to the async DMA rings. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_cs.c | 12 ++++++++++++ include/uapi/drm/radeon_drm.h | 1 + 2 files changed, 13 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 1b32a5a..396baba 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c @@ -112,6 +112,18 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority } else p->ring = RADEON_RING_TYPE_GFX_INDEX; break; + case RADEON_CS_RING_DMA: + if (p->rdev->family >= CHIP_CAYMAN) { + if (p->priority > 0) + p->ring = R600_RING_TYPE_DMA_INDEX; + else + p->ring = CAYMAN_RING_TYPE_DMA1_INDEX; + } else if (p->rdev->family >= CHIP_R600) { + p->ring = R600_RING_TYPE_DMA_INDEX; + } else { + return -EINVAL; + } + break; } return 0; } diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h index 5645a87..eeda917 100644 --- a/include/uapi/drm/radeon_drm.h +++ b/include/uapi/drm/radeon_drm.h @@ -917,6 +917,7 @@ struct drm_radeon_gem_va { /* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring type */ #define RADEON_CS_RING_GFX 0 #define RADEON_CS_RING_COMPUTE 1 +#define RADEON_CS_RING_DMA 2 /* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority */ /* 0 = normal, + = higher priority, - = lower priority */