From patchwork Wed Dec 26 11:27:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prathyush K X-Patchwork-Id: 1910941 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id ADFB5DFAC4 for ; Wed, 26 Dec 2012 11:09:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC63EE60E9 for ; Wed, 26 Dec 2012 03:09:35 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 13D40E60B8 for ; Wed, 26 Dec 2012 03:05:28 -0800 (PST) Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MFM00622XGYC0X0@mailout1.samsung.com> for dri-devel@lists.freedesktop.org; Wed, 26 Dec 2012 20:05:26 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id CE.76.12699.6F9DAD05; Wed, 26 Dec 2012 20:05:26 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-20-50dad9f60f76 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id AE.76.12699.6F9DAD05; Wed, 26 Dec 2012 20:05:26 +0900 (KST) Received: from chrome-ubuntu.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MFM0029MXGTEU90@mmp1.samsung.com> for dri-devel@lists.freedesktop.org; Wed, 26 Dec 2012 20:05:26 +0900 (KST) From: Prathyush K To: dri-devel@lists.freedesktop.org Subject: [PATCH 5/8] drm/exynos: mixer: do not finish a pageflip if layer update in progress Date: Wed, 26 Dec 2012 06:27:42 -0500 Message-id: <1356521265-22749-6-git-send-email-prathyush.k@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1356521265-22749-1-git-send-email-prathyush.k@samsung.com> References: <1356521265-22749-1-git-send-email-prathyush.k@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNLMWRmVeSWpSXmKPExsWyRsSkRvfbzVsBBhsOGFtc+fqezYHR4373 caYAxigum5TUnMyy1CJ9uwSujN9fD7EV/JCr2PDXooFxt2QXIyeHhICJxPn3h1khbDGJC/fW s3UxcnEICSxllDj67AUrTNHi6WfYIRKLGCV+fu6GcjYySdyfu4QRpIpNQFvi15y7YB0iAsoS fyeuAoszC0hIHGk/CzSWg0NYIE6ivU0XJMwioCrRvKeLCcTmFXCXWHv+HzPEMjmJD3sesYPY nAIeEhc27gEbKQRU0/bgAytEr4DEt8mHWEBGSgjISmw6wAxyjoTAdTaJ4//eM0HMkZQ4uOIG ywRG4QWMDKsYRVMLkguKk9JzjfSKE3OLS/PS9ZLzczcxAkPw9L9n0jsYVzVYHGIU4GBU4uHl /HUzQIg1say4MvcQowQHs5IIr8KqWwFCvCmJlVWpRfnxRaU5qcWHGH2ALpnILCWanA+Mj7yS eENjE3NTY1NLIyMzU1McwkrivM0eKQFCAumJJanZqakFqUUw45g4OKUaGFX8vfgdGi+z/P9i l+VoFjXdLzc/3EZ6jvsnwZI/JVuuX6xTzHFwTV3BxC9Q+6WG+dFesYc3tlQnXu/Ut1BI9ciJ 5JLSdnj1ynDbbmVnNhYn2anf2/kvHLPj3/mPOfGUf7548/Pm/APuC1cddLgxs1xmnuuMJrlO sbKOwAs8bqz792muytBSYinOSDTUYi4qTgQA2gmHVm4CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupikeLIzCtJLcpLzFFi42I5/e+xgO63m7cCDNaf1La48vU9mwOjx/3u 40wBjFENjDYZqYkpqUUKqXnJ+SmZeem2St7B8c7xpmYGhrqGlhbmSgp5ibmptkouPgG6bpk5 QGOVFMoSc0qBQgGJxcVK+naYJoSGuOlawDRG6PqGBMH1GBmggYQ1jBm/vx5iK/ghV7Hhr0UD 427JLkZODgkBE4nF08+wQ9hiEhfurWfrYuTiEBJYxCjx83M3O4SzkUni/twljCBVbALaEr/m 3GUFsUUElCX+TlwFFmcWkJA40n4WqJuDQ1ggTqK9TRckzCKgKtG8p4sJxOYVcJdYe/4fM8Qy OYkPex6BLeYU8JC4sHEP2EghoJq2Bx9YJzDyLmBkWMUomlqQXFCclJ5rpFecmFtcmpeul5yf u4kRHODPpHcwrmqwOMQowMGoxMPL+etmgBBrYllxZe4hRgkOZiURXoVVtwKEeFMSK6tSi/Lj i0pzUosPMfoAXTWRWUo0OR8YfXkl8YbGJuamxqaWJhYmZpY4hJXEeZs9UgKEBNITS1KzU1ML UotgxjFxcEo1MLrUzQ24+LW5UKOIz33dUaPPnc+epT+0lVpxwopV6qmRoXHuvfLV8zsq5q3z 7OysvL/XkmdGrNxvsfR8A+kVW+u5D870V1O4d61g1ZsfJq0/UuYtrljrpPtzumrpigSdw8ed d7+8ar3Pd6nvAckfk5pnq75pjc8vX/5oxpUnMv/Da3fPXLCjrlKJpTgj0VCLuag4EQCTbMME nQIAAA== X-CFilter-Loop: Reflected X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org From: Sean Paul We should not finish a pageflip or set wait_for_vblank to zero if a layer update is pending. This might result in a page fault or corruption on screen. This patch adds a check in the irq handler to exit if a layer update is pending. Also, calls layer_update only once per layer per vsync. Signed-off-by: Sean Paul Signed-off-by: Prathyush K --- drivers/gpu/drm/exynos/exynos_mixer.c | 35 ++++++++++++++++++++++++++++++----- drivers/gpu/drm/exynos/regs-mixer.h | 1 + 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 2506567..3369d57 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -58,6 +58,7 @@ struct hdmi_win_data { unsigned int mode_width; unsigned int mode_height; unsigned int scan_flags; + bool updated; bool enabled; bool resume; }; @@ -486,16 +487,21 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) vp_regs_dump(ctx); } -static void mixer_layer_update(struct mixer_context *ctx) +static int mixer_get_layer_update_count(struct mixer_context *ctx) { struct mixer_resources *res = &ctx->mixer_res; u32 val; val = mixer_reg_read(res, MXR_CFG); - /* allow one update per vsync only */ - if (!(val & MXR_CFG_LAYER_UPDATE_COUNT_MASK)) - mixer_reg_writemask(res, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE); + return (val & MXR_CFG_LAYER_UPDATE_COUNT_MASK) >> + MXR_CFG_LAYER_UPDATE_COUNT0; +} + +static void mixer_layer_update(struct mixer_context *ctx) +{ + struct mixer_resources *res = &ctx->mixer_res; + mixer_reg_writemask(res, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE); } static void mixer_graph_buffer(struct mixer_context *ctx, int win) @@ -547,6 +553,11 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) ctx->interlace = false; spin_lock_irqsave(&res->reg_slock, flags); + + /* Only allow one update per vsync */ + if (ctx->mxr_ver == MXR_VER_16_0_33_0 && win_data->updated) + goto end; + mixer_vsync_set_update(ctx, false); /* setup format */ @@ -580,12 +591,15 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) mixer_cfg_layer(ctx, win, true); /* layer update mandatory for mixer 16.0.33.0 */ - if (ctx->mxr_ver == MXR_VER_16_0_33_0) + if (ctx->mxr_ver == MXR_VER_16_0_33_0) { mixer_layer_update(ctx); + win_data->updated = true; + } mixer_run(ctx); mixer_vsync_set_update(ctx, true); +end: spin_unlock_irqrestore(&res->reg_slock, flags); } @@ -1000,6 +1014,7 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) struct mixer_context *ctx = drm_hdmi_ctx->ctx; struct mixer_resources *res = &ctx->mixer_res; u32 val, base, shadow; + int i; spin_lock(&res->reg_slock); @@ -1022,6 +1037,16 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) } drm_handle_vblank(drm_hdmi_ctx->drm_dev, ctx->pipe); + + if (ctx->mxr_ver == MXR_VER_16_0_33_0) { + /* Bail out if a layer update is pending */ + if (mixer_get_layer_update_count(ctx)) + goto out; + + for (i = 0; i < MIXER_WIN_NR; i++) + ctx->win_data[i].updated = false; + } + mixer_finish_pageflip(drm_hdmi_ctx->drm_dev, ctx->pipe); /* set wait vsync event to zero and wake up queue. */ diff --git a/drivers/gpu/drm/exynos/regs-mixer.h b/drivers/gpu/drm/exynos/regs-mixer.h index 5d8dbc0..bad2b99 100644 --- a/drivers/gpu/drm/exynos/regs-mixer.h +++ b/drivers/gpu/drm/exynos/regs-mixer.h @@ -79,6 +79,7 @@ /* bits for MXR_CFG */ #define MXR_CFG_LAYER_UPDATE (1 << 31) +#define MXR_CFG_LAYER_UPDATE_COUNT0 29 #define MXR_CFG_LAYER_UPDATE_COUNT_MASK (3 << 29) #define MXR_CFG_RGB601_0_255 (0 << 9) #define MXR_CFG_RGB601_16_235 (1 << 9)