| Message ID | 1360423656-10816-3-git-send-email-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index a575cb2..40f380a 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -105,12 +105,11 @@ drm_clflush_sg(struct sg_table *st) { #if defined(CONFIG_X86) if (cpu_has_clflush) { - struct scatterlist *sg; - int i; + struct drm_sg_iter sg_iter; mb(); - for_each_sg(st->sgl, sg, st->nents, i) - drm_clflush_page(sg_page(sg)); + drm_for_each_sg_page(&sg_iter, st->sgl, 0) + drm_clflush_page(sg_iter.page); mb(); return;
So far the assumption was that each scatter list entry contains a single page. This might not hold in the future, when we'll introduce compact scatter lists, so prepare for this here. Reference: http://www.spinics.net/lists/dri-devel/msg33917.html Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/drm_cache.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)