From patchwork Thu Mar 7 09:42:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leela Krishna Amudala X-Patchwork-Id: 2232361 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 8B0B83FCF6 for ; Thu, 7 Mar 2013 14:23:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7365AE6BA5 for ; Thu, 7 Mar 2013 06:23:22 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) by gabe.freedesktop.org (Postfix) with ESMTP id C48E2E5DBB for ; Thu, 7 Mar 2013 01:22:04 -0800 (PST) Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MJA00I0Y9ZJQNO0@mailout2.samsung.com> for dri-devel@lists.freedesktop.org; Thu, 07 Mar 2013 18:22:03 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.123]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 7A.47.17763.B3C58315; Thu, 07 Mar 2013 18:22:03 +0900 (KST) X-AuditID: cbfee690-b7f6b6d000004563-c5-51385c3bae8f Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 63.EF.03880.B3C58315; Thu, 07 Mar 2013 18:22:03 +0900 (KST) Received: from chrome-ubuntu.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MJA000ATA0FNP00@mmp1.samsung.com> for dri-devel@lists.freedesktop.org; Thu, 07 Mar 2013 18:22:03 +0900 (KST) From: Leela Krishna Amudala To: dri-devel@lists.freedesktop.org Subject: [PATCH V3] drm/exynos: fimd: calculate the correct address offset Date: Thu, 07 Mar 2013 04:42:21 -0500 Message-id: <1362649341-28112-1-git-send-email-l.krishna@samsung.com> X-Mailer: git-send-email 1.8.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrLLMWRmVeSWpSXmKPExsWyRsSkWtc6xiLQ4OQTSYsrX9+zOTB63O8+ zhTAGMVlk5Kak1mWWqRvl8CV0b/tHHvBGcGKGScvsDYwLuLrYuTgkBAwkVj/g7eLkRPIFJO4 cG89WxcjF4eQwFJGibl9DSwQCROJM+eOMEMkFjFKLN77nh3C2cgk0fBpFSNIFZuAscT9uZuZ QGwRAWWJvxMh4swChhI7v3SDTRIW8JK4/vECWJxFQFXixpRGZhCbV8BV4tGzOVDb5CQ+7HkE tkBCYAebxPPZf1ggGgQkvk0+xAJxtqzEpgPMEPWSEgdX3GCZwCi4gJFhFaNoakFyQXFSepGJ XnFibnFpXrpecn7uJkZgUJ3+92zCDsZ7B6wPMSYDjZvILCWanA8MyrySeENjE3NTY1MzI0tL S1PShJXEeeUvyQQKCaQnlqRmp6YWpBbFF5XmpBYfYmTi4JRqYEyImOXuVdvIbs/8vOMgQ656 /T2Na+c3aC38ppE1te/us4qWpY3TDl34dCtqaWCtXvQRjkvu5lsVOsxiAlsuykzcMn9B/vtZ 9jM+P49Y63BBUWuT71XXwm9Pwq8qc+p8Pxwk4fZ1zbH/LZ7lracfeAQx6vqu3Mmz+vm+yR0P g7OCp8hbPz/Hz6zEUpyRaKjFXFScCADStmioQAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupmkeLIzCtJLcpLzFFi42I5/e+xgK51jEWgwYelQhZXvr5nc2D0uN99 nCmAMaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMH aKySQlliTilQKCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0kLCGMaN/2zn2gjOCFTNOXmBt YFzE18XIySEhYCJx5twRZghbTOLCvfVsXYxcHEICixglFu99zw7hbGSSaPi0ihGkik3AWOL+ 3M1MILaIgLLE34kQcWYBQ4mdX7pZQGxhAS+J6x8vgMVZBFQlbkxpBNvAK+Aq8ejZHBaIbXIS H/Y8Yp/AyL2AkWEVo2hqQXJBcVJ6rpFecWJucWleul5yfu4mRnDQPpPewbiqweIQowAHoxIP 78Yc80Ah1sSy4srcQ4wSHMxKIrwX5CwChXhTEiurUovy44tKc1KLDzEmA22fyCwlmpwPjKi8 knhDYxNzU2NTSxMLEzNL0oSVxHkZTz0JEBJITyxJzU5NLUgtgtnCxMEp1cDI9Sq6oHfvxeMs y67dYfZ3naXfr/d2ruhxFsldWSZaJldOPvkyOf6a0waZ8/K8Fv+3OzS4xPzxmjnPYboGe3Tu lCCvhYckp0xhrmKcHjA3zS/saXiJhlcl//WlPfaLWG03lYno7pjWVWJePaMlY3KCocmiRb/K uI0NLcPs/ohJhwRvYn+2arMSS3FGoqEWc1FxIgCLgKLIngIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Mailman-Approved-At: Thu, 07 Mar 2013 06:16:28 -0800 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Calculate the correct address offset values for alpha and color key control registers based on exynos4 and exynos5 user manuals. Signed-off-by: Leela Krishna Amudala Acked-by: Joonyoung Shim --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 9537761..f5f2b25 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -38,11 +38,12 @@ /* position control register for hardware window 0, 2 ~ 4.*/ #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16) #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16) -/* size control register for hardware window 0. */ -#define VIDOSD_C_SIZE_W0 (VIDOSD_BASE + 0x08) -/* alpha control register for hardware window 1 ~ 4. */ -#define VIDOSD_C(win) (VIDOSD_BASE + 0x18 + (win) * 16) -/* size control register for hardware window 1 ~ 4. */ +/* + * size control register for hardware windows 0 and alpha control register + * for hardware windows 1 ~ 4 + */ +#define VIDOSD_C(win) (VIDOSD_BASE + 0x08 + (win) * 16) +/* size control register for hardware windows 1 ~ 2. */ #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16) #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8) @@ -50,9 +51,9 @@ #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4) /* color key control register for hardware window 1 ~ 4. */ -#define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + (x * 8)) +#define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8)) /* color key value register for hardware window 1 ~ 4. */ -#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + (x * 8)) +#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8)) /* FIMD has totally five hardware windows. */ #define WINDOWS_NR 5 @@ -581,7 +582,7 @@ static void fimd_win_commit(struct device *dev, int zpos) if (win != 3 && win != 4) { u32 offset = VIDOSD_D(win); if (win == 0) - offset = VIDOSD_C_SIZE_W0; + offset = VIDOSD_C(win); val = win_data->ovl_width * win_data->ovl_height; writel(val, ctx->regs + offset);