From patchwork Tue Sep 24 12:05:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arto Merilainen X-Patchwork-Id: 2933621 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1641ABFF05 for ; Tue, 24 Sep 2013 12:16:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E567F2010E for ; Tue, 24 Sep 2013 12:16:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B7F5C20109 for ; Tue, 24 Sep 2013 12:16:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A8145E6C43 for ; Tue, 24 Sep 2013 05:16:03 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from hqemgate15.nvidia.com (hqemgate15.nvidia.com [216.228.121.64]) by gabe.freedesktop.org (Postfix) with ESMTP id EED8FE7352 for ; Tue, 24 Sep 2013 05:14:44 -0700 (PDT) Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 24 Sep 2013 05:09:33 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 24 Sep 2013 05:05:58 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 24 Sep 2013 05:05:58 -0700 Received: from amerilainen-lnx.Nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.327.1; Tue, 24 Sep 2013 05:09:33 -0700 From: Arto Merilainen To: , Subject: [PATCHv3 3/4] drm/tegra: Add runtime pm support for dc Date: Tue, 24 Sep 2013 15:05:24 +0300 Message-ID: <1380024325-18280-4-git-send-email-amerilainen@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1380024325-18280-1-git-send-email-amerilainen@nvidia.com> References: <1380024325-18280-1-git-send-email-amerilainen@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Cc: linux-tegra@vger.kernel.org, mkulkarni@nvidia.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, amerilainen@nvidia.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-6.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mayuresh Kulkarni This patch adds initial runtime pm support for Tegra display controller. As of now, the dc clock is enabled in device probe via runtime pm and disabled in device remove. In case pm runtime is not configured, we simply enable the clock in device probe (..and disable it in remove). Signed-off-by: Mayuresh Kulkarni Signed-off-by: Arto Merilainen --- drivers/gpu/host1x/drm/dc.c | 58 +++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 53 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/host1x/drm/dc.c b/drivers/gpu/host1x/drm/dc.c index b1a05ad..6d1d5fc 100644 --- a/drivers/gpu/host1x/drm/dc.c +++ b/drivers/gpu/host1x/drm/dc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "host1x_client.h" #include "dc.h" @@ -24,6 +25,9 @@ struct tegra_plane { unsigned int index; }; +static int tegra_dc_runtime_suspend(struct device *dev); +static int tegra_dc_runtime_resume(struct device *dev); + static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane) { return container_of(plane, struct tegra_plane, base); @@ -1128,9 +1132,7 @@ static int tegra_dc_probe(struct platform_device *pdev) return PTR_ERR(dc->clk); } - err = clk_prepare_enable(dc->clk); - if (err < 0) - return err; + platform_set_drvdata(pdev, dc); regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); dc->regs = devm_ioremap_resource(&pdev->dev, regs); @@ -1147,6 +1149,15 @@ static int tegra_dc_probe(struct platform_device *pdev) dc->client.ops = &dc_client_ops; dc->client.dev = &pdev->dev; + pm_runtime_enable(&pdev->dev); + if (!pm_runtime_enabled(&pdev->dev)) { + err = tegra_dc_runtime_resume(&pdev->dev); + if (err < 0) + return err; + } + + pm_runtime_get_sync(&pdev->dev); + err = tegra_dc_rgb_probe(dc); if (err < 0 && err != -ENODEV) { dev_err(&pdev->dev, "failed to probe RGB output: %d\n", err); @@ -1160,8 +1171,6 @@ static int tegra_dc_probe(struct platform_device *pdev) return err; } - platform_set_drvdata(pdev, dc); - return 0; } @@ -1178,11 +1187,49 @@ static int tegra_dc_remove(struct platform_device *pdev) return err; } + pm_runtime_put(&pdev->dev); + if (pm_runtime_enabled(&pdev->dev)) + pm_runtime_disable(&pdev->dev); + else + tegra_dc_runtime_suspend(&pdev->dev); + + return 0; +} + +static int tegra_dc_runtime_suspend(struct device *dev) +{ + struct tegra_dc *dc; + + dc = dev_get_drvdata(dev); + if (!dc) + return -EINVAL; + clk_disable_unprepare(dc->clk); return 0; } +static int tegra_dc_runtime_resume(struct device *dev) +{ + int err = 0; + struct tegra_dc *dc; + + dc = dev_get_drvdata(dev); + if (!dc) + return -EINVAL; + + err = clk_prepare_enable(dc->clk); + if (err < 0) + dev_err(dev, "failed to enable clock\n"); + + return err; +} + +static const struct dev_pm_ops tegra_dc_pm_ops = { + SET_RUNTIME_PM_OPS(tegra_dc_runtime_suspend, + tegra_dc_runtime_resume, NULL) +}; + static struct of_device_id tegra_dc_of_match[] = { { .compatible = "nvidia,tegra30-dc", }, { .compatible = "nvidia,tegra20-dc", }, @@ -1194,6 +1241,7 @@ struct platform_driver tegra_dc_driver = { .name = "tegra-dc", .owner = THIS_MODULE, .of_match_table = tegra_dc_of_match, + .pm = &tegra_dc_pm_ops, }, .probe = tegra_dc_probe, .remove = tegra_dc_remove,