From patchwork Sun Oct 6 20:46:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 2993371 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 51034BF924 for ; Sun, 6 Oct 2013 20:47:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 538FB201F6 for ; Sun, 6 Oct 2013 20:47:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5A079201EF for ; Sun, 6 Oct 2013 20:47:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A112E6D96 for ; Sun, 6 Oct 2013 13:47:56 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ea0-f180.google.com (mail-ea0-f180.google.com [209.85.215.180]) by gabe.freedesktop.org (Postfix) with ESMTP id 63044E6C4E for ; Sun, 6 Oct 2013 13:46:58 -0700 (PDT) Received: by mail-ea0-f180.google.com with SMTP id h10so2836417eaj.11 for ; Sun, 06 Oct 2013 13:46:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n+txdPZhLj/XdFMI+VGeYtCo/VpcUgKkFZG0VMMx2QU=; b=JhF900tH9i7dj6GeSJ4rbcJtQVhsEROCqNN+PpkPTU7k/kRD/gD2wQRWo72/aj1095 Ea8POdvtqdvi5nj67lQ9qAozo154C+Sww930UZejW9/EmCHik5+w7chTrZfMfcIB10I5 uWY6bKEsD7QP97nL2BgcGkYD5yak7CcxrohXQplZ9hx88QHxSFXiaroAvBEZaECk/lN6 Lk72zfUEye73ZJMc+7IFgF7IpZeIpSCQVHoi4AKHyg36Wg5DcYApPcLa8/H19t8tpmOr 35kTDpNihRev0Xz9W68Aee20d21nm2Qlvm9w52dShV4djuRCUAA57q+fG8ecZ/bDYDAt NtLQ== X-Received: by 10.14.4.1 with SMTP id 1mr43444140eei.21.1381092417269; Sun, 06 Oct 2013 13:46:57 -0700 (PDT) Received: from linux-samsung700g7a.lan (ip-194-187-74-233.konfederacka.maverick.com.pl. [194.187.74.233]) by mx.google.com with ESMTPSA id j7sm54979224eeo.15.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 06 Oct 2013 13:46:56 -0700 (PDT) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: dri-devel@lists.freedesktop.org Subject: [RFC][PATCH 2/2] drm/radeon: add missing writes for DCE4+ HDMI mode Date: Sun, 6 Oct 2013 22:46:48 +0200 Message-Id: <1381092408-27135-2-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1381092408-27135-1-git-send-email-zajec5@gmail.com> References: <1381092408-27135-1-git-send-email-zajec5@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP They were verified to be used by fglrx on PALM, BARTS, CAICOS and VERDE. VERDE which is DCE6 seems to need also clearing 0x7138 register. See https://bugzilla.kernel.org/show_bug.cgi?id=62591 for details. --- That patches weren't tested with the HW, please don't apply them yet. --- drivers/gpu/drm/radeon/dce6_afmt.c | 10 ++++++++++ drivers/gpu/drm/radeon/evergreen_hdmi.c | 20 +++++++++++++++----- drivers/gpu/drm/radeon/evergreend.h | 3 +++ 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c index 85a69d2..cb4eb3a 100644 --- a/drivers/gpu/drm/radeon/dce6_afmt.c +++ b/drivers/gpu/drm/radeon/dce6_afmt.c @@ -56,6 +56,14 @@ static void dce6_endpoint_wreg(struct radeon_device *rdev, #define RREG32_ENDPOINT(block, reg) dce6_endpoint_rreg(rdev, (block), (reg)) #define WREG32_ENDPOINT(block, reg, v) dce6_endpoint_wreg(rdev, (block), (reg), (v)) +#define WREG32_ENDPOINT_P(block, reg, val, mask) \ + do { \ + uint32_t tmp_ = RREG32_ENDPOINT(block, reg); \ + tmp_ &= (mask); \ + tmp_ |= ((val) & ~(mask)); \ + WREG32_ENDPOINT(block, reg, tmp_); \ + } while (0) +#define WREG32_ENDPOINT_OR(block, reg, or) WREG32_ENDPOINT_P(block, reg, or, ~(or)) static void dce6_afmt_get_connected_pins(struct radeon_device *rdev) @@ -196,6 +204,8 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder) } BUG_ON(!sads); + WREG32_ENDPOINT_OR(offset, 0x25, 0x40); + for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) { u32 value = 0; int j; diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c index 50f6299..2935161 100644 --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c @@ -137,6 +137,8 @@ static void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder) } BUG_ON(!sads); + WREG32_OR(0x5f80, 0x40); + for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) { u32 value = 0; int j; @@ -280,7 +282,8 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode WREG32(AFMT_AUDIO_PACKET_CONTROL + offset, AFMT_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */ - /* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */ + WREG32_AND(AFMT_AUDIO_PACKET_CONTROL2, + ~(AFMT_AUDIO_LAYOUT_OVRD | AFMT_60958_CS_SOURCE)); WREG32(HDMI_ACR_PACKET_CONTROL + offset, HDMI_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */ @@ -302,16 +305,18 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode AFMT_60958_CS_CHANNEL_NUMBER_6(7) | AFMT_60958_CS_CHANNEL_NUMBER_7(8)); + if (ASIC_IS_DCE6(rdev)) + WREG32(0x7138 + offset, 0); + if (ASIC_IS_DCE6(rdev)) { dce6_afmt_write_speaker_allocation(encoder); } else { dce4_afmt_write_speaker_allocation(encoder); } - WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset, - AFMT_AUDIO_CHANNEL_ENABLE(0xff)); - - /* fglrx sets 0x40 in 0x5f80 here */ + WREG32_P(AFMT_AUDIO_PACKET_CONTROL2 + offset, + AFMT_AUDIO_CHANNEL_ENABLE(0xff), + ~AFMT_AUDIO_CHANNEL_MASK); if (ASIC_IS_DCE6(rdev)) { dce6_afmt_select_pin(encoder); @@ -342,6 +347,11 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode HDMI_AVI_INFO_LINE(2), /* anything other than 0 */ ~HDMI_AVI_INFO_LINE_MASK); + WREG32_AND(HDMI_GENERIC_PACKET_CONTROL + offset, + ~(HDMI_GENERIC0_SEND | HDMI_GENERIC0_CONT | HDMI_GENERIC0_MASK)); + WREG32_AND(HDMI_GENERIC_PACKET_CONTROL + offset, + ~(HDMI_GENERIC1_SEND | HDMI_GENERIC1_CONT | HDMI_GENERIC1_MASK)); + WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset, AFMT_AUDIO_SAMPLE_SEND); /* send audio packets */ } diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index 8768fd6..5724ae5 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h @@ -561,7 +561,9 @@ # define HDMI_GENERIC1_SEND (1 << 4) # define HDMI_GENERIC1_CONT (1 << 5) # define HDMI_GENERIC0_LINE(x) (((x) & 0x3f) << 16) +# define HDMI_GENERIC0_MASK (0x3f << 16) # define HDMI_GENERIC1_LINE(x) (((x) & 0x3f) << 24) +# define HDMI_GENERIC1_MASK (0x3f << 24) #define HDMI_GC 0x7058 # define HDMI_GC_AVMUTE (1 << 0) # define HDMI_GC_AVMUTE_CONT (1 << 2) @@ -570,6 +572,7 @@ # define AFMT_AUDIO_LAYOUT_SELECT (1 << 1) # define AFMT_60958_CS_SOURCE (1 << 4) # define AFMT_AUDIO_CHANNEL_ENABLE(x) (((x) & 0xff) << 8) +# define AFMT_AUDIO_CHANNEL_MASK (0xff << 8) # define AFMT_DP_AUDIO_STREAM_ID(x) (((x) & 0xff) << 16) #define AFMT_AVI_INFO0 0x7084 # define AFMT_AVI_INFO_CHECKSUM(x) (((x) & 0xff) << 0)