From patchwork Wed Dec 11 10:34:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 3324101 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 96DE29F37A for ; Wed, 11 Dec 2013 10:36:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B278E20136 for ; Wed, 11 Dec 2013 10:36:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5200C200EA for ; Wed, 11 Dec 2013 10:36:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4608B1057AE for ; Wed, 11 Dec 2013 02:36:23 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ea0-f181.google.com (mail-ea0-f181.google.com [209.85.215.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 17788FB572 for ; Wed, 11 Dec 2013 02:35:01 -0800 (PST) Received: by mail-ea0-f181.google.com with SMTP id m10so2781065eaj.26 for ; Wed, 11 Dec 2013 02:35:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0OHGXZKMX5AsWEhO2Wz+SAm8LJMSEYyhgIEXCfKfr+g=; b=N6g28wudJ3VkcOlCYOmIS8SY19NCU3LwI3rfN/V6+DZprE6BI12ejUw/6Xi+NDepEX 7r5eNMEkEBGesAhJUAWx6CWKvIlnvlSMprjQmlQz7Q//ePIWIqFKkXMRYl7DDYmyiY9T AJrElhLqGea6CfutanTXwpv0Z1yd7uwcLJmMA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0OHGXZKMX5AsWEhO2Wz+SAm8LJMSEYyhgIEXCfKfr+g=; b=KBRTKs7dkdSnymycDr/oRBCFx/D3NvdO1pkimseafZeiHuj5G9Oo+Epg0l47b+WuNj K9Touo8HILL8+gnfrPhBhzXhK4sFGcvAko3ZY87MrVQPjgEWf8st+J84z7UDvVFZF6O8 47tBNeg+kIyczweESO6Jky5B1+1+ZHVzzjPjB2RGMhLhJX27GXFkxQj04LSjY/upggWQ RkstPldqDxGqQ248ZrEOjJIKiG7j/bXPaIpH8y54Srq+qLVxaiD/RYFyNMsEUbJ86DcG OmMyMxcrTl+67TLPNWnLs9sKcp8hkLsw0DICWNdI/cfxWjK1yd4mNV6VQG1rSG84PB+U PwGg== X-Gm-Message-State: ALoCoQksKgOWWhVL9GQ5JEBIu1oZNQBxw8thOmWyr3378hXErm3BidgoL/9TEcOM76AbRmnBSmx8 X-Received: by 10.14.114.71 with SMTP id b47mr1073893eeh.26.1386758101431; Wed, 11 Dec 2013 02:35:01 -0800 (PST) Received: from phenom.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPSA id b41sm51932269eef.16.2013.12.11.02.35.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Dec 2013 02:35:00 -0800 (PST) From: Daniel Vetter To: DRI Development Subject: [PATCH 24/50] drm: Kill DRM_*MEMORYBARRIER Date: Wed, 11 Dec 2013 11:34:45 +0100 Message-Id: <1386758111-3446-25-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.8.4.3 In-Reply-To: <1386758111-3446-1-git-send-email-daniel.vetter@ffwll.ch> References: <1386758111-3446-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The real linux interfaces are soooo much easier on the eyes ... Signed-off-by: Daniel Vetter --- drivers/gpu/drm/gma500/psb_irq.c | 2 +- drivers/gpu/drm/mga/mga_drv.h | 2 +- drivers/gpu/drm/nouveau/nouveau_dma.c | 2 +- drivers/gpu/drm/nouveau/nouveau_dma.h | 2 +- drivers/gpu/drm/r128/r128_drv.h | 2 +- drivers/gpu/drm/radeon/radeon_cp.c | 2 +- drivers/gpu/drm/radeon/radeon_ring.c | 2 +- drivers/gpu/drm/savage/savage_bci.c | 6 +++--- drivers/gpu/drm/savage/savage_state.c | 2 +- drivers/gpu/drm/via/via_dma.c | 4 ++-- drivers/gpu/drm/via/via_dmablit.c | 2 +- include/drm/drm_os_linux.h | 7 ------- 12 files changed, 14 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c index ef00bce9991a..a9bb34704738 100644 --- a/drivers/gpu/drm/gma500/psb_irq.c +++ b/drivers/gpu/drm/gma500/psb_irq.c @@ -253,7 +253,7 @@ irqreturn_t psb_irq_handler(int irq, void *arg) PSB_WVDC32(vdc_stat, PSB_INT_IDENTITY_R); (void) PSB_RVDC32(PSB_INT_IDENTITY_R); - DRM_READMEMORYBARRIER(); + rmb(); if (!handled) return IRQ_NONE; diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h index 901e4f935fed..fe453213600a 100644 --- a/drivers/gpu/drm/mga/mga_drv.h +++ b/drivers/gpu/drm/mga/mga_drv.h @@ -193,7 +193,7 @@ extern void mga_driver_irq_uninstall(struct drm_device *dev); extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); -#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() +#define mga_flush_write_combine() wmb() #define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg)) #define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg)) diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c index 40f91e1e5842..c177272152e2 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.c +++ b/drivers/gpu/drm/nouveau/nouveau_dma.c @@ -100,7 +100,7 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo, chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max; - DRM_MEMORYBARRIER(); + mb(); /* Flush writes. */ nouveau_bo_rd32(pb, 0); diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h index 984004d66a6d..dc0e0c5cadb4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.h +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h @@ -155,7 +155,7 @@ BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data) } #define WRITE_PUT(val) do { \ - DRM_MEMORYBARRIER(); \ + mb(); \ nouveau_bo_rd32(chan->push.buffer, 0); \ nv_wo32(chan->object, chan->user_put, ((val) << 2) + chan->push.vma.offset); \ } while (0) diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h index 4318bfa845cb..5bf3f5ff805d 100644 --- a/drivers/gpu/drm/r128/r128_drv.h +++ b/drivers/gpu/drm/r128/r128_drv.h @@ -514,7 +514,7 @@ do { \ if (R128_VERBOSE) \ DRM_INFO("COMMIT_RING() tail=0x%06x\n", \ dev_priv->ring.tail); \ - DRM_MEMORYBARRIER(); \ + mb(); \ R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail); \ R128_READ(R128_PM4_BUFFER_DL_WPTR); \ } while (0) diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index d73013e6f58a..bb0d5c3a8311 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c @@ -2228,7 +2228,7 @@ void radeon_commit_ring(drm_radeon_private_t *dev_priv) dev_priv->ring.tail &= dev_priv->ring.tail_mask; - DRM_MEMORYBARRIER(); + mb(); GET_RING_HEAD( dev_priv ); if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 9214403ae173..ca2d71afeb02 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c @@ -463,7 +463,7 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring) while (ring->wptr & ring->align_mask) { radeon_ring_write(ring, ring->nop); } - DRM_MEMORYBARRIER(); + mb(); radeon_ring_set_wptr(rdev, ring); } diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c index 6e673fa968e5..d2b2df9e26f3 100644 --- a/drivers/gpu/drm/savage/savage_bci.c +++ b/drivers/gpu/drm/savage/savage_bci.c @@ -49,7 +49,7 @@ savage_bci_wait_fifo_shadow(drm_savage_private_t * dev_priv, unsigned int n) #endif for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { - DRM_MEMORYBARRIER(); + mb(); status = dev_priv->status_ptr[0]; if ((status & mask) < threshold) return 0; @@ -123,7 +123,7 @@ savage_bci_wait_event_shadow(drm_savage_private_t * dev_priv, uint16_t e) int i; for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) { - DRM_MEMORYBARRIER(); + mb(); status = dev_priv->status_ptr[1]; if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff || (status & 0xffff) == 0) @@ -449,7 +449,7 @@ static void savage_dma_flush(drm_savage_private_t * dev_priv) } } - DRM_MEMORYBARRIER(); + mb(); /* do flush ... */ phys_addr = dev_priv->cmd_dma->offset + diff --git a/drivers/gpu/drm/savage/savage_state.c b/drivers/gpu/drm/savage/savage_state.c index 2d3e56d94be3..c01ad0aeaa58 100644 --- a/drivers/gpu/drm/savage/savage_state.c +++ b/drivers/gpu/drm/savage/savage_state.c @@ -1032,7 +1032,7 @@ int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_ /* Make sure writes to DMA buffers are finished before sending * DMA commands to the graphics hardware. */ - DRM_MEMORYBARRIER(); + mb(); /* Coming from user space. Don't know if the Xserver has * emitted wait commands. Assuming the worst. */ diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c index 3436fdad22c5..5d4179284964 100644 --- a/drivers/gpu/drm/via/via_dma.c +++ b/drivers/gpu/drm/via/via_dma.c @@ -60,7 +60,7 @@ dev_priv->dma_low += 8; \ } -#define via_flush_write_combine() DRM_MEMORYBARRIER() +#define via_flush_write_combine() mb() #define VIA_OUT_RING_QW(w1, w2) do { \ *vb++ = (w1); \ @@ -543,7 +543,7 @@ static void via_cmdbuf_start(drm_via_private_t *dev_priv) VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - DRM_WRITEMEMORYBARRIER(); + wmb(); VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); VIA_READ(VIA_REG_TRANSPACE); diff --git a/drivers/gpu/drm/via/via_dmablit.c b/drivers/gpu/drm/via/via_dmablit.c index 694b9954cbbc..ba33cf679180 100644 --- a/drivers/gpu/drm/via/via_dmablit.c +++ b/drivers/gpu/drm/via/via_dmablit.c @@ -217,7 +217,7 @@ via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine) VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); - DRM_WRITEMEMORYBARRIER(); + wmb(); VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04); } diff --git a/include/drm/drm_os_linux.h b/include/drm/drm_os_linux.h index 2953b1d83022..43008938b6b2 100644 --- a/include/drm/drm_os_linux.h +++ b/include/drm/drm_os_linux.h @@ -35,19 +35,12 @@ static inline void writeq(u64 val, void __iomem *reg) #define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset)) /** Write a dword into a MMIO region */ #define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset)) -/** Read memory barrier */ /** Read a qword from a MMIO region - be careful using these unless you really understand them */ #define DRM_READ64(map, offset) readq(((void __iomem *)(map)->handle) + (offset)) /** Write a qword into a MMIO region */ #define DRM_WRITE64(map, offset, val) writeq(val, ((void __iomem *)(map)->handle) + (offset)) -#define DRM_READMEMORYBARRIER() rmb() -/** Write memory barrier */ -#define DRM_WRITEMEMORYBARRIER() wmb() -/** Read/write memory barrier */ -#define DRM_MEMORYBARRIER() mb() - #define DRM_WAIT_ON( ret, queue, timeout, condition ) \ do { \ DECLARE_WAITQUEUE(entry, current); \