From patchwork Wed Apr 16 15:12:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Stanislawski X-Patchwork-Id: 4002321 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D4F8ABFF02 for ; Wed, 16 Apr 2014 15:13:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0D3C320357 for ; Wed, 16 Apr 2014 15:13:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 35D832035C for ; Wed, 16 Apr 2014 15:13:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 56D3A6E079; Wed, 16 Apr 2014 08:13:33 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) by gabe.freedesktop.org (Postfix) with ESMTP id 932576EA9D for ; Wed, 16 Apr 2014 08:13:32 -0700 (PDT) Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N4400HLIQAJB520@mailout4.samsung.com> for dri-devel@lists.freedesktop.org; Thu, 17 Apr 2014 00:13:31 +0900 (KST) X-AuditID: cbfee61b-b7f456d000006dfd-dc-534e9e1b3f13 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 15.20.28157.B1E9E435; Thu, 17 Apr 2014 00:13:31 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N44001CNQ9OVS50@mmp2.samsung.com>; Thu, 17 Apr 2014 00:13:31 +0900 (KST) From: Tomasz Stanislawski To: linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCHv3 5/5] drm: exynos: hdmi: add support for pixel clock limitation Date: Wed, 16 Apr 2014 17:12:58 +0200 Message-id: <1397661178-6016-6-git-send-email-t.stanislaws@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1397661178-6016-1-git-send-email-t.stanislaws@samsung.com> References: <1397661178-6016-1-git-send-email-t.stanislaws@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBLMWRmVeSWpSXmKPExsVy+t9jQV3peX7BBpOeG1psnLGe1eLK1/ds FpPuT2CxeHHvIovF2aY37BYP5t5ksphxfh+TxcV18hYTpq9lsZiy6DCrReveI+wWMya/ZLNY P+M1i8W89pesDnwea+atYfTYtKqTzeN+93Emj/6/Bh59W1YxenzeJBfAFsVlk5Kak1mWWqRv l8CV0dgzk7WgUaCifcUitgbGSbxdjJwcEgImEkt2HmWHsMUkLtxbzwZiCwlMZ5R4eQ3K7mKS uLRVHsRmA6o/tuQzYxcjB4eIgJvErP+sXYxcHMwCu5gkli3fwwJSIywQILHvWjPYTBYBVYnW 3pnMIDavgLvE/q2nWSF2KUp0P5sANp9TwENiyflWFohd7hK987sYJzDyLmBkWMUomlqQXFCc lJ5rpFecmFtcmpeul5yfu4kRHJ7PpHcwrmqwOMQowMGoxMM7M8c3WIg1say4MvcQowQHs5II r+U0v2Ah3pTEyqrUovz4otKc1OJDjNIcLErivAdbrQOFBNITS1KzU1MLUotgskwcnFINjP1O PJnJj635NlSwspgsVhCoiI3nk5W79iht4c61M2YEvlsQf2NG2/y9Z02+n5ddzvFYhuXH2lVF eRnnP5yfeUNXXk4oPmhG/KHvafsXzejeMcXnm/0GO9/vy7YKWC7QZE3doehd+UDlxHNpc3/T Q5wbtVp/bZx2wv/O67iz+1qeVRZHqH5fmqvEUpyRaKjFXFScCACEzVyiSwIAAA== Cc: Tomasz Stanislawski , pawel.moll@arm.com, b.zolnierkie@samsung.com, sw0312.kim@samsung.com, kyungmin.park@samsung.com, robh+dt@kernel.org, rahul.sharma@samsung.com, m.chehab@samsung.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds support for limitation of maximal pixel clock of HDMI signal. This feature is needed on boards that contains lines or bridges with frequency limitations. Signed-off-by: Tomasz Stanislawski --- .../devicetree/bindings/video/exynos_hdmi.txt | 4 ++++ drivers/gpu/drm/exynos/exynos_hdmi.c | 11 +++++++++++ 2 files changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt index f9187a2..8718f8d 100644 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt @@ -28,6 +28,10 @@ Required properties: - ddc: phandle to the hdmi ddc node - phy: phandle to the hdmi phy node +Optional properties: +- max-pixel-clock: used to limit the maximal pixel clock if a board has lines, + connectors or bridges not capable of carring higher frequencies + Example: hdmi { diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 9adbd34..e012ba9 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -194,6 +194,7 @@ struct hdmi_context { struct hdmi_resources res; int hpd_gpio; + u32 max_pixel_clock; enum hdmi_type type; }; @@ -886,6 +887,9 @@ static int hdmi_mode_valid(struct drm_connector *connector, if (ret) return MODE_BAD; + if (mode->clock * 1000 > hdata->max_pixel_clock) + return MODE_CLOCK_HIGH; + ret = hdmi_find_phy_conf(hdata, mode->clock * 1000); if (ret < 0) return MODE_BAD; @@ -2022,6 +2026,13 @@ static int drm_hdmi_dt_parse(struct hdmi_context *hdata, struct device_node *np) return -ENOENT; } + of_property_read_u32(np, "max-pixel-clock", &hdata->max_pixel_clock); + if (!hdata->max_pixel_clock) { + DRM_INFO("max-pixel-clock is zero, using INF\n"); + hdata->max_pixel_clock = U32_MAX; + } + + return 0; }