From patchwork Wed May 14 21:27:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 4178071 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E048DBFF02 for ; Wed, 14 May 2014 21:28:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 22EFE20145 for ; Wed, 14 May 2014 21:28:22 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5AFE0200DE for ; Wed, 14 May 2014 21:28:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B18B36E12A; Wed, 14 May 2014 14:28:20 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 49CBD6ED17 for ; Wed, 14 May 2014 14:28:18 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id e53so100717eek.8 for ; Wed, 14 May 2014 14:28:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=GVVKhemokaJgPktxI/tUOdH5UxGKCUblebC4uNJCVSo=; b=LWbGfawSfmTlTL6X1+5QIRm29ZLgp3+cvQ5jT0A/h+IrE0AVCI/KymlvdI3I88ljwD ynQi+qr4erYvTeJHG3H+Ub+8ta1RxsFYKXeHAgIm+C7a0UNirs54csVE0LVu7W780LoK TJZ3FPNavAHsZglfxEiXS2vlZxwTjgaMnwCwh9GtGN21xoSON5xbzkKicquYmsc9fgha GHyT9wndkxGb4VuoMyEg+x1ii3cvg8c8DLtMAe07RthJTSuETNdngYvPEbjxAprNPa7c EileiMCHavk8MW8MG5qDu0I/KeftH6H6WchOWKG6ymt1zy/qMT4ny0jB87HJGP0/CbAQ qxgw== X-Received: by 10.14.251.4 with SMTP id a4mr8383301ees.20.1400102897534; Wed, 14 May 2014 14:28:17 -0700 (PDT) Received: from linux-tdhb.lan (ip-194-187-74-233.konfederacka.maverick.com.pl. [194.187.74.233]) by mx.google.com with ESMTPSA id p9sm7754864eeg.32.2014.05.14.14.28.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 May 2014 14:28:16 -0700 (PDT) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: dri-devel@lists.freedesktop.org, =?UTF-8?q?Christian=20K=C3=B6nig?= Subject: [deathsimple/drm-next-3.16][2/4] drm/radeon/hdmi: DCE3: clean ACR control Date: Wed, 14 May 2014 23:27:57 +0200 Message-Id: <1400102879-3164-2-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1400102879-3164-1-git-send-email-zajec5@gmail.com> References: <1400102879-3164-1-git-send-email-zajec5@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP What initially seemed to be a typo in fglrx (using register 0x740c instead of 74dc) appeared to be a correct behavior. Without this 0x740c reg operation DCE 3 doesn't work and it seems we got code for that already in place. Recent RE effors allowed to finally understand this magic: WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000); This has been tested for possible regressions on DCE3 HD3470 (RV620). Signed-off-by: Rafa? Mi?ecki --- drivers/gpu/drm/radeon/r600_hdmi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index b8b2efa..d4c13a0 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -332,6 +332,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; struct hdmi_avi_infoframe frame; uint32_t offset; + uint32_t acr_ctl; ssize_t err; if (!dig || !dig->afmt) @@ -351,15 +352,15 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod WREG32(HDMI0_VBI_PACKET_CONTROL + offset, HDMI0_NULL_SEND); /* send null packets when required */ - WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000); - WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset, HDMI0_AUDIO_SAMPLE_SEND | /* send audio packets */ HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */ HDMI0_AUDIO_PACKETS_PER_LINE(3) | /* should be suffient for all audio modes and small enough for all hblanks */ HDMI0_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */ - WREG32(HDMI0_ACR_PACKET_CONTROL + offset, + /* DCE 3.0 uses register that's normally for CRC_CONTROL */ + acr_ctl = ASIC_IS_DCE3(rdev) ? 0x740c : HDMI0_ACR_PACKET_CONTROL; + WREG32(acr_ctl + offset, HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */ HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */