From patchwork Mon Jul 7 14:51:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 4506321 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 41715BEECB for ; Tue, 8 Jul 2014 16:12:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3FC54202F8 for ; Tue, 8 Jul 2014 16:12:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 764332035C for ; Tue, 8 Jul 2014 16:12:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 62C526E5A9; Tue, 8 Jul 2014 09:12:22 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (top.free-electrons.com [176.31.233.9]) by gabe.freedesktop.org (Postfix) with ESMTP id 5AF766E3C3 for ; Mon, 7 Jul 2014 07:51:39 -0700 (PDT) Received: by mail.free-electrons.com (Postfix, from userid 106) id B5D2315CC; Mon, 7 Jul 2014 16:51:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=ham version=3.3.1 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 939161594; Mon, 7 Jul 2014 16:51:38 +0200 (CEST) From: Boris BREZILLON To: Samuel Ortiz , Lee Jones , Thierry Reding , linux-pwm@vger.kernel.org, David Airlie , dri-devel@lists.freedesktop.org, Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Andrew Victor Subject: [PATCH v3 08/11] ARM: AT91/dt: add alternative pin muxing for sama5d3 lcd pins Date: Mon, 7 Jul 2014 16:51:08 +0200 Message-Id: <1404744671-1629-9-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1404744671-1629-1-git-send-email-boris.brezillon@free-electrons.com> References: <1404744671-1629-1-git-send-email-boris.brezillon@free-electrons.com> X-Mailman-Approved-At: Tue, 08 Jul 2014 09:12:18 -0700 Cc: Mark Rutland , devicetree@vger.kernel.org, Jean-Jacques Hiblot , Pawel Moll , Ian Campbell , Rob Herring , Laurent Pinchart , Bo Shen , Kumar Gala , Thomas Petazzoni X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Define alternative pin muxing for the LCDC pins. Signed-off-by: Boris BREZILLON --- arch/arm/boot/dts/sama5d3_lcd.dtsi | 50 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi index 2186b89..9642eef 100644 --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi +++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi @@ -82,6 +82,28 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ + AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ + AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD17 pin */ + }; + + pinctrl_lcd_rgb666_alt: lcd-rgb-2-alt { + atmel,pins = + ; /* LCDD17 pin */ }; @@ -104,6 +126,34 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ + AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ + AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ + AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ + AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ + AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ + AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ + AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ + AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ + }; + + pinctrl_lcd_rgb888_alt: lcd-rgb-3-alt { + atmel,pins = +