| Message ID | 1405680964-6869-3-git-send-email-inki.dae@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
+CC: Thierry and Alexandre On 07/18/2014 12:56 PM, Inki Dae wrote: > This patch adds LPM transfer support for video or command data. > > With this patch, Exynos MIPI DSI controller can transfer command or > video data with HS or LP mode in accordance with mode_flags set > by LCD Panel driver. > > Signed-off-by: Inki Dae <inki.dae@samsung.com> > Acked-by: Kyungmin Park <kyungmin.park@samsung.com> > --- > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 22 ++++++++++++++++++++-- > 1 file changed, 20 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > index 2df3592..b120554 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > @@ -426,13 +426,28 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi) > | DSIM_ESC_PRESCALER(esc_div) > | DSIM_LANE_ESC_CLK_EN_CLK > | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1) > - | DSIM_BYTE_CLK_SRC(0) > - | DSIM_TX_REQUEST_HSCLK; > + | DSIM_BYTE_CLK_SRC(0); > + > + if (!(dsi->mode_flags & MIPI_DSI_MODE_CMD_LPM)) > + reg |= DSIM_TX_REQUEST_HSCLK; > + Maybe I missed sth but it seems to me slightly unrelated to LPM flag. According to specs some panels can require this clock even in LPM mode. I wonder if recently introduced MIPI_DSI_CLOCK_NON_CONTINUOUS wouldn't handle it. > writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG); > > return 0; > } > > +static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi, > + bool enable) > +{ > + u32 reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG); > + > + reg &= ~DSIM_TX_REQUEST_HSCLK; > + if (enable) > + reg |= DSIM_TX_REQUEST_HSCLK; > + > + writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG); > +} > + > static void exynos_dsi_disable_clock(struct exynos_dsi *dsi) > { > u32 reg; > @@ -575,6 +590,9 @@ static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable) > { > u32 reg; > > + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_LPM)) > + exynos_dsi_enable_hs_clock(dsi, true); > + It does not care about enable argument of the function, I guess it should. Regards Andrzej > reg = readl(dsi->reg_base + DSIM_MDRESOL_REG); > if (enable) > reg |= DSIM_MAIN_STAND_BY;
On 2014? 07? 24? 19:48, Andrzej Hajda wrote: > +CC: Thierry and Alexandre > > On 07/18/2014 12:56 PM, Inki Dae wrote: >> This patch adds LPM transfer support for video or command data. >> >> With this patch, Exynos MIPI DSI controller can transfer command or >> video data with HS or LP mode in accordance with mode_flags set >> by LCD Panel driver. >> >> Signed-off-by: Inki Dae <inki.dae@samsung.com> >> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> >> --- >> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 22 ++++++++++++++++++++-- >> 1 file changed, 20 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c >> index 2df3592..b120554 100644 >> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c >> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c >> @@ -426,13 +426,28 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi) >> | DSIM_ESC_PRESCALER(esc_div) >> | DSIM_LANE_ESC_CLK_EN_CLK >> | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1) >> - | DSIM_BYTE_CLK_SRC(0) >> - | DSIM_TX_REQUEST_HSCLK; >> + | DSIM_BYTE_CLK_SRC(0); >> + >> + if (!(dsi->mode_flags & MIPI_DSI_MODE_CMD_LPM)) >> + reg |= DSIM_TX_REQUEST_HSCLK; >> + > > Maybe I missed sth but it seems to me slightly unrelated to LPM flag. > According to specs some panels can require this clock even in LPM mode. > I wonder if recently introduced MIPI_DSI_CLOCK_NON_CONTINUOUS wouldn't > handle it. It's different. MIPI DSI spec says, "For continuous clock behaviour, the Clock Lane remains in high-speed mode generating active clock signals between HS data packet transmissions. For non-continuous clock behaviour, *the Clock Lane enters the LP-11 state between HS data packet transmissions*." > >> writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG); >> >> return 0; >> } >> >> +static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi, >> + bool enable) >> +{ >> + u32 reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG); >> + >> + reg &= ~DSIM_TX_REQUEST_HSCLK; >> + if (enable) >> + reg |= DSIM_TX_REQUEST_HSCLK; >> + >> + writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG); >> +} >> + >> static void exynos_dsi_disable_clock(struct exynos_dsi *dsi) >> { >> u32 reg; >> @@ -575,6 +590,9 @@ static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable) >> { >> u32 reg; >> >> + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_LPM)) >> + exynos_dsi_enable_hs_clock(dsi, true); >> + > > It does not care about enable argument of the function, I guess it should. > Yes, it's better to enable HS clock only in case of enabling. So will add one more flag like below, if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_LPM) && enable) Thank, Inki Dae > Regards > Andrzej > >> reg = readl(dsi->reg_base + DSIM_MDRESOL_REG); >> if (enable) >> reg |= DSIM_MAIN_STAND_BY; > > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 2df3592..b120554 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -426,13 +426,28 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi) | DSIM_ESC_PRESCALER(esc_div) | DSIM_LANE_ESC_CLK_EN_CLK | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1) - | DSIM_BYTE_CLK_SRC(0) - | DSIM_TX_REQUEST_HSCLK; + | DSIM_BYTE_CLK_SRC(0); + + if (!(dsi->mode_flags & MIPI_DSI_MODE_CMD_LPM)) + reg |= DSIM_TX_REQUEST_HSCLK; + writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG); return 0; } +static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi, + bool enable) +{ + u32 reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG); + + reg &= ~DSIM_TX_REQUEST_HSCLK; + if (enable) + reg |= DSIM_TX_REQUEST_HSCLK; + + writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG); +} + static void exynos_dsi_disable_clock(struct exynos_dsi *dsi) { u32 reg; @@ -575,6 +590,9 @@ static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable) { u32 reg; + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_LPM)) + exynos_dsi_enable_hs_clock(dsi, true); + reg = readl(dsi->reg_base + DSIM_MDRESOL_REG); if (enable) reg |= DSIM_MAIN_STAND_BY;