From patchwork Tue Jul 22 13:11:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 4602091 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 609139F375 for ; Tue, 22 Jul 2014 13:11:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5E5EA20154 for ; Tue, 22 Jul 2014 13:11:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 12A612015A for ; Tue, 22 Jul 2014 13:11:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 40AFC6E4EC; Tue, 22 Jul 2014 06:11:51 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (top.free-electrons.com [176.31.233.9]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DE8E6E4EB for ; Tue, 22 Jul 2014 06:11:49 -0700 (PDT) Received: by mail.free-electrons.com (Postfix, from userid 106) id 087AAA84; Tue, 22 Jul 2014 15:11:49 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=ham version=3.3.1 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id D92997F8; Tue, 22 Jul 2014 15:11:47 +0200 (CEST) From: Boris BREZILLON To: Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Andrew Victor , David Airlie , dri-devel@lists.freedesktop.org, Thierry Reding , linux-pwm@vger.kernel.org, Samuel Ortiz , Lee Jones , Rob Clark , Laurent Pinchart Subject: [PATCH v4 07/11] ARM: AT91/dt: split sama5d3 lcd pin definitions to match RGB mode configs Date: Tue, 22 Jul 2014 15:11:31 +0200 Message-Id: <1406034695-15534-8-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1406034695-15534-1-git-send-email-boris.brezillon@free-electrons.com> References: <1406034695-15534-1-git-send-email-boris.brezillon@free-electrons.com> Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, Rob Herring , Bo Shen , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444, RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen RGB mode. Split pin definitions to be able to set pin config according to the selected mode. Signed-off-by: Boris BREZILLON --- arch/arm/boot/dts/sama5d3_lcd.dtsi | 127 ++++++++++++++++++++++++++++--------- 1 file changed, 96 insertions(+), 31 deletions(-) diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi index 85d3027..2186b89 100644 --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi +++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi @@ -15,38 +15,103 @@ apb { pinctrl@fffff200 { lcd { - pinctrl_lcd: lcd-0 { + pinctrl_lcd_pwm: lcd-pwm-0 { + atmel,pins = ; /* LCDPWM */ + }; + + pinctrl_lcd_base: lcd-base-0 { + atmel,pins = + ; /* LCDPCK */ + }; + + pinctrl_lcd_rgb444: lcd-rgb-0 { + atmel,pins = + ; /* LCDD11 pin */ + }; + + pinctrl_lcd_rgb565: lcd-rgb-1 { + atmel,pins = + ; /* LCDD15 pin */ + }; + + pinctrl_lcd_rgb666: lcd-rgb-2 { + atmel,pins = + ; /* LCDD17 pin */ + }; + + pinctrl_lcd_rgb888: lcd-rgb-3 { atmel,pins = - ; /* PE28 periph C LCDD23 pin */ + ; /* LCDD23 pin */ }; }; };