From patchwork Fri Dec 5 08:35:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 5442771 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3E6C8BEEBA for ; Fri, 5 Dec 2014 08:36:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5748220361 for ; Fri, 5 Dec 2014 08:36:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3039E20374 for ; Fri, 5 Dec 2014 08:36:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 318956E3EF; Fri, 5 Dec 2014 00:36:01 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wg0-f42.google.com (mail-wg0-f42.google.com [74.125.82.42]) by gabe.freedesktop.org (Postfix) with ESMTP id 832666E3E8 for ; Fri, 5 Dec 2014 00:35:59 -0800 (PST) Received: by mail-wg0-f42.google.com with SMTP id z12so284961wgg.1 for ; Fri, 05 Dec 2014 00:35:58 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dU0WWFuD2I82V+UGcKtdsVlylnpJl9X/bso4RGoPVew=; b=DVc3oChTCNf+9lx7DhSVpuUOqQ9p9fj79i3/VffOyylbnGbvwutr3S6nK8Ii2MmDfs AS9be5SJoQmGc+a080PAgvmeZH0rq++eNX7tJyfOcuZBv5EHMfaq6s9DhwWaLvxSM7hG L9VYyYAML0Ya2psurzKcYs6D0ogVPWpUMc/g8/gIC1PZTc2pfN1FBfGRgjwlugEDVF4y O/4zBl84V/QFO/Kt7EoSFQWqXpAd1RT5oyYCXbSkGKbdpCEZIs3BzUPDHZIelgrptuwa OEdWniYzL7y9qMX8iUMYr/QIAX17kBd0a9F4//vN3C60j2AGITMAsiElQNU8Ywwrx26s bQGg== X-Gm-Message-State: ALoCoQlaX186NO7XUBFzwdIW0UJT5b2yrDgWYIu9DSEUAh9WG3xvqXyN7Mq+uf4SsO/M1wBXsKAG X-Received: by 10.194.92.116 with SMTP id cl20mr22795030wjb.71.1417768558899; Fri, 05 Dec 2014 00:35:58 -0800 (PST) Received: from lmenx321.lme.st.com (LPuteaux-656-1-48-212.w82-127.abo.wanadoo.fr. [82.127.83.212]) by mx.google.com with ESMTPSA id eu8sm1299618wib.21.2014.12.05.00.35.57 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Dec 2014 00:35:57 -0800 (PST) From: Benjamin Gaignard To: dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org Subject: [PATCH 4/9] drm: sti: simplify gdp code Date: Fri, 5 Dec 2014 09:35:02 +0100 Message-Id: <1417768507-7538-5-git-send-email-benjamin.gaignard@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1417768507-7538-1-git-send-email-benjamin.gaignard@linaro.org> References: <1417768507-7538-1-git-send-email-benjamin.gaignard@linaro.org> Cc: Benjamin Gaignard X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Store the physical address at node creation time to avoid use of virt_to_dma and dma_to_virt everywhere Signed-off-by: Benjamin Gaignard --- drivers/gpu/drm/sti/sti_gdp.c | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c index 4e30b74..1b903ff 100644 --- a/drivers/gpu/drm/sti/sti_gdp.c +++ b/drivers/gpu/drm/sti/sti_gdp.c @@ -73,7 +73,9 @@ struct sti_gdp_node { struct sti_gdp_node_list { struct sti_gdp_node *top_field; + dma_addr_t top_field_paddr; struct sti_gdp_node *btm_field; + dma_addr_t btm_field_paddr; }; /** @@ -168,7 +170,6 @@ static int sti_gdp_get_alpharange(int format) static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_layer *layer) { int hw_nvn; - void *virt_nvn; struct sti_gdp *gdp = to_sti_gdp(layer); unsigned int i; @@ -176,11 +177,9 @@ static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_layer *layer) if (!hw_nvn) goto end; - virt_nvn = dma_to_virt(layer->dev, (dma_addr_t) hw_nvn); - for (i = 0; i < GDP_NODE_NB_BANK; i++) - if ((virt_nvn != gdp->node_list[i].btm_field) && - (virt_nvn != gdp->node_list[i].top_field)) + if ((hw_nvn != gdp->node_list[i].btm_field_paddr) && + (hw_nvn != gdp->node_list[i].top_field_paddr)) return &gdp->node_list[i]; /* in hazardious cases restart with the first node */ @@ -204,7 +203,6 @@ static struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_layer *layer) { int hw_nvn; - void *virt_nvn; struct sti_gdp *gdp = to_sti_gdp(layer); unsigned int i; @@ -212,11 +210,9 @@ struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_layer *layer) if (!hw_nvn) goto end; - virt_nvn = dma_to_virt(layer->dev, (dma_addr_t) hw_nvn); - for (i = 0; i < GDP_NODE_NB_BANK; i++) - if ((virt_nvn == gdp->node_list[i].btm_field) || - (virt_nvn == gdp->node_list[i].top_field)) + if ((hw_nvn == gdp->node_list[i].btm_field_paddr) || + (hw_nvn == gdp->node_list[i].top_field_paddr)) return &gdp->node_list[i]; end: @@ -292,8 +288,8 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare) /* Same content and chained together */ memcpy(btm_field, top_field, sizeof(*btm_field)); - top_field->gam_gdp_nvn = virt_to_dma(dev, btm_field); - btm_field->gam_gdp_nvn = virt_to_dma(dev, top_field); + top_field->gam_gdp_nvn = list->btm_field_paddr; + btm_field->gam_gdp_nvn = list->top_field_paddr; /* Interlaced mode */ if (layer->mode->flags & DRM_MODE_FLAG_INTERLACE) @@ -349,8 +345,8 @@ static int sti_gdp_commit_layer(struct sti_layer *layer) struct sti_gdp_node *updated_top_node = updated_list->top_field; struct sti_gdp_node *updated_btm_node = updated_list->btm_field; struct sti_gdp *gdp = to_sti_gdp(layer); - u32 dma_updated_top = virt_to_dma(layer->dev, updated_top_node); - u32 dma_updated_btm = virt_to_dma(layer->dev, updated_btm_node); + u32 dma_updated_top = updated_list->top_field_paddr; + u32 dma_updated_btm = updated_list->btm_field_paddr; struct sti_gdp_node_list *curr_list = sti_gdp_get_current_nodes(layer); dev_dbg(layer->dev, "%s %s top/btm_node:0x%p/0x%p\n", __func__, @@ -461,16 +457,16 @@ static void sti_gdp_init(struct sti_layer *layer) { struct sti_gdp *gdp = to_sti_gdp(layer); struct device_node *np = layer->dev->of_node; - dma_addr_t dma; + dma_addr_t dma_addr; void *base; unsigned int i, size; /* Allocate all the nodes within a single memory page */ size = sizeof(struct sti_gdp_node) * GDP_NODE_PER_FIELD * GDP_NODE_NB_BANK; - base = dma_alloc_writecombine(layer->dev, - size, &dma, GFP_KERNEL | GFP_DMA); + size, &dma_addr, GFP_KERNEL | GFP_DMA); + if (!base) { DRM_ERROR("Failed to allocate memory for GDP node\n"); return; @@ -478,21 +474,26 @@ static void sti_gdp_init(struct sti_layer *layer) memset(base, 0, size); for (i = 0; i < GDP_NODE_NB_BANK; i++) { - if (virt_to_dma(layer->dev, base) & 0xF) { + if (dma_addr & 0xF) { DRM_ERROR("Mem alignment failed\n"); return; } gdp->node_list[i].top_field = base; + gdp->node_list[i].top_field_paddr = dma_addr; + DRM_DEBUG_DRIVER("node[%d].top_field=%p\n", i, base); base += sizeof(struct sti_gdp_node); + dma_addr += sizeof(struct sti_gdp_node); - if (virt_to_dma(layer->dev, base) & 0xF) { + if (dma_addr & 0xF) { DRM_ERROR("Mem alignment failed\n"); return; } gdp->node_list[i].btm_field = base; + gdp->node_list[i].btm_field_paddr = dma_addr; DRM_DEBUG_DRIVER("node[%d].btm_field=%p\n", i, base); base += sizeof(struct sti_gdp_node); + dma_addr += sizeof(struct sti_gdp_node); } if (of_device_is_compatible(np, "st,stih407-compositor")) {