From patchwork Thu Jan 29 19:18:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 5744771 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E6E3B9F399 for ; Thu, 29 Jan 2015 19:18:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 169022022D for ; Thu, 29 Jan 2015 19:18:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1A6EC201BB for ; Thu, 29 Jan 2015 19:18:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 97B2C6E7B3; Thu, 29 Jan 2015 11:18:52 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-yk0-f171.google.com (mail-yk0-f171.google.com [209.85.160.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 740236E7B3 for ; Thu, 29 Jan 2015 11:18:51 -0800 (PST) Received: by mail-yk0-f171.google.com with SMTP id 10so14901147ykt.2 for ; Thu, 29 Jan 2015 11:18:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=I6V11pmHBPnHdTBYaqMUGdrAbF8UAPzYFvpK+32gFEQ=; b=dVvS3Sn+T8wHZzQTjF6L1rq/AdrLFupajwPf+grzmmrBp5+PQFwX9+Q41x94qbgeow HlkQVdzA9lFU76Q3x55guxjo2Fs9K+C04XomFcGUS6/pCKWihPNgNzL0bdTYrL4KeXuO jZQC0snoERYCoK0OyAfFu5pQEogwkyKUofXQs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=I6V11pmHBPnHdTBYaqMUGdrAbF8UAPzYFvpK+32gFEQ=; b=SfCGIh6BzfUKyAILQoIvr2Bu1jGxPCIId9QJfjjScI/Hdf6XW1/e+7kYP5kN7hah8y nhotO7HZ41OlAQmZEnIf7kvs87quNmzBI8LRBNiSSCZvLz5OaS/aeTfndtVMh3WQr6wM csIklGMjjC+0zCjYZ9kViJrHzGVA1hGS5nvptnghGcQ29Hd6Uqf3lT51IiGMtoaOS1Ka fVUDJIQw00zQNgBl9ekZV5/o947r15HFlA8gs5xnl9xZahdhtpmOq3cvr26tDp0kazuP rWNE5Oku+rb6QznW0Nup4yaY1x/LLzJvZ1Jg6l3bvg7N7ndAG99P2WQ6SPG5NQ8uOXVh 9Egg== X-Gm-Message-State: ALoCoQnuj26WtVo12h8Uukk3dTUu2X8tZcSt03SGA0BvEEThjpCdhUs+BcdTwI5wEMJP7TQH9GZk X-Received: by 10.236.105.227 with SMTP id k63mr1253455yhg.100.1422559131045; Thu, 29 Jan 2015 11:18:51 -0800 (PST) Received: from billyjoel.corp.google.com ([100.96.106.205]) by mx.google.com with ESMTPSA id o10sm5066941yho.51.2015.01.29.11.18.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 29 Jan 2015 11:18:50 -0800 (PST) From: Sean Paul To: thierry.reding@gmail.com Subject: [PATCH v2] drm/tegra: Add tegra_gem_mmap2 to fix 64-bit offsets Date: Thu, 29 Jan 2015 14:18:41 -0500 Message-Id: <1422559121-24477-1-git-send-email-seanpaul@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: References: Cc: marcheu@chromium.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 64-bit targets, tegra_gem_mmap doesn't return the offset to userspace. As such, subsequent calls to mmap(2) fail. Add a new tegra_gem_mmap2 ioctl to fix this. Signed-off-by: Sean Paul Reviewed-by: Rob Clark --- drivers/gpu/drm/tegra/drm.c | 21 +++++++++++++++++++++ include/uapi/drm/tegra_drm.h | 9 +++++++++ 2 files changed, 30 insertions(+) diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index d4f8275..be5dbe7 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c @@ -343,6 +343,26 @@ static int tegra_gem_create(struct drm_device *drm, void *data, return 0; } +static int tegra_gem_mmap2(struct drm_device *drm, void *data, + struct drm_file *file) +{ + struct drm_tegra_gem_mmap2 *args = data; + struct drm_gem_object *gem; + struct tegra_bo *bo; + + gem = drm_gem_object_lookup(drm, file, args->handle); + if (!gem) + return -EINVAL; + + bo = to_tegra_bo(gem); + + args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); + + drm_gem_object_unreference(gem); + + return 0; +} + static int tegra_gem_mmap(struct drm_device *drm, void *data, struct drm_file *file) { @@ -677,6 +697,7 @@ static const struct drm_ioctl_desc tegra_drm_ioctls[] = { DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED), DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED), DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED), + DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP2, tegra_gem_mmap2, DRM_UNLOCKED), #endif }; diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h index c15d781..9057b0f 100644 --- a/include/uapi/drm/tegra_drm.h +++ b/include/uapi/drm/tegra_drm.h @@ -167,6 +167,13 @@ struct drm_tegra_gem_get_flags { __u32 flags; }; +struct drm_tegra_gem_mmap2 { + __u32 handle; + __u32 pad; + __u64 offset; +}; + + #define DRM_TEGRA_GEM_CREATE 0x00 #define DRM_TEGRA_GEM_MMAP 0x01 #define DRM_TEGRA_SYNCPT_READ 0x02 @@ -181,6 +188,7 @@ struct drm_tegra_gem_get_flags { #define DRM_TEGRA_GEM_GET_TILING 0x0b #define DRM_TEGRA_GEM_SET_FLAGS 0x0c #define DRM_TEGRA_GEM_GET_FLAGS 0x0d +#define DRM_TEGRA_GEM_MMAP2 0x0e #define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create) #define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap) @@ -196,5 +204,6 @@ struct drm_tegra_gem_get_flags { #define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling) #define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags) #define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags) +#define DRM_IOCTL_TEGRA_GEM_MMAP2 DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP2, struct drm_tegra_gem_mmap2) #endif