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[3/4] drm/dp: add DPCD definitions from eDP 1.2

Message ID 1424868414-23532-3-git-send-email-jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jani Nikula Feb. 25, 2015, 12:46 p.m. UTC
Mostly display control related DPCD addresses.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 include/drm/drm_dp_helper.h | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

sonika.jindal@intel.com Feb. 26, 2015, 9:51 a.m. UTC | #1
On Wednesday 25 February 2015 06:16 PM, Jani Nikula wrote:
> Mostly display control related DPCD addresses.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   include/drm/drm_dp_helper.h | 32 ++++++++++++++++++++++++++++++++
>   1 file changed, 32 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 209c5b91b0e8..cc96024e8776 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -426,6 +426,38 @@
>   
>   #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>   
> +#define DP_EDP_GENERAL_CAP_1		    0x701
> +
> +#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
> +
> +#define DP_EDP_GENERAL_CAP_2		    0x703
> +
> +#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
> +
> +#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
> +
> +#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
> +#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
> +
> +#define DP_EDP_PWMGEN_BIT_COUNT             0x724
> +#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
> +#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
> +
> +#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
> +
> +#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
> +
> +#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
> +#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
> +#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
> +
> +#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
> +#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
> +#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
> +
> +#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
> +#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
> +
>   #define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
>   #define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
>   #define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */
Checked against edp1.3 spec.

Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Daniel Vetter Feb. 26, 2015, 1:23 p.m. UTC | #2
On Thu, Feb 26, 2015 at 03:21:13PM +0530, sonika wrote:
> 
> On Wednesday 25 February 2015 06:16 PM, Jani Nikula wrote:
> >Mostly display control related DPCD addresses.
> >
> >Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >---
> >  include/drm/drm_dp_helper.h | 32 ++++++++++++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >
> >diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> >index 209c5b91b0e8..cc96024e8776 100644
> >--- a/include/drm/drm_dp_helper.h
> >+++ b/include/drm/drm_dp_helper.h
> >@@ -426,6 +426,38 @@
> >  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
> >+#define DP_EDP_GENERAL_CAP_1		    0x701
> >+
> >+#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
> >+
> >+#define DP_EDP_GENERAL_CAP_2		    0x703
> >+
> >+#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
> >+
> >+#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
> >+
> >+#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
> >+#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
> >+
> >+#define DP_EDP_PWMGEN_BIT_COUNT             0x724
> >+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
> >+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
> >+
> >+#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
> >+
> >+#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
> >+
> >+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
> >+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
> >+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
> >+
> >+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
> >+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
> >+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
> >+
> >+#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
> >+#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
> >+
> >  #define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
> >  #define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
> >  #define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */
> Checked against edp1.3 spec.
> 
> Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>

Merged this and patch 1 to drm-misc.
-Daniel
diff mbox

Patch

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 209c5b91b0e8..cc96024e8776 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -426,6 +426,38 @@ 
 
 #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
 
+#define DP_EDP_GENERAL_CAP_1		    0x701
+
+#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
+
+#define DP_EDP_GENERAL_CAP_2		    0x703
+
+#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
+
+#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
+
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
+
+#define DP_EDP_PWMGEN_BIT_COUNT             0x724
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
+
+#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
+
+#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
+
+#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
+#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
+
 #define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
 #define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
 #define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */