@@ -69,7 +69,7 @@ void __iomem *etnaviv_ioremap(struct platform_device *pdev, const char *name,
void etnaviv_writel(u32 data, void __iomem *addr)
{
if (reglog)
- printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
+ printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
writel(data, addr);
}
@@ -77,7 +77,7 @@ u32 etnaviv_readl(const void __iomem *addr)
{
u32 val = readl(addr);
if (reglog)
- printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
+ printk(KERN_DEBUG "IO:R %p %08x\n", addr, val);
return val;
}
@@ -852,9 +852,9 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master,
struct etnaviv_gpu *gpu = dev_get_drvdata(dev);
int idx = gpu->pipe;
- dev_info(dev, "pre gpu[idx]: 0x%08x\n", (u32)priv->gpu[idx]);
+ dev_info(dev, "pre gpu[idx]: %p\n", priv->gpu[idx]);
- if (priv->gpu[idx] == 0) {
+ if (priv->gpu[idx] == NULL) {
dev_info(dev, "adding core @idx %d\n", idx);
priv->gpu[idx] = gpu;
} else {
@@ -862,7 +862,7 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master,
goto fail;
}
- dev_info(dev, "post gpu[idx]: 0x%08x\n", (u32)priv->gpu[idx]);
+ dev_info(dev, "post gpu[idx]: %p\n", priv->gpu[idx]);
gpu->dev = drm;