@@ -292,7 +292,7 @@ int etnaviv_gem_get_iova_locked(struct etnaviv_gpu *gpu,
if (!node)
return -ENOMEM;
- ret = drm_mm_insert_node(&gpu->mm, node, obj->size, 0,
+ ret = drm_mm_insert_node(&mmu->mm, node, obj->size, 0,
DRM_MM_SEARCH_DEFAULT);
if (!ret) {
@@ -947,8 +947,6 @@ static void etnaviv_gpu_unbind(struct device *dev, struct device *master,
if (gpu->mmu)
etnaviv_iommu_destroy(gpu->mmu);
-
- drm_mm_takedown(&gpu->mm);
}
static const struct component_ops gpu_ops = {
@@ -1028,8 +1026,6 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev)
gpu->pipe = (int)match->data;
/* TODO: figure out max mapped size */
- drm_mm_init(&gpu->mm, 0x80000000, SZ_1G);
-
dev_set_drvdata(dev, gpu);
err = component_add(&pdev->dev, &gpu_ops);
@@ -113,9 +113,6 @@ struct etnaviv_gpu {
struct etnaviv_iommu *mmu;
- /* memory manager for GPU address area */
- struct drm_mm mm;
-
/* Power Control: */
struct clk *clk_bus;
struct clk *clk_core;
@@ -92,6 +92,7 @@ int etnaviv_iommu_unmap(struct etnaviv_iommu *iommu, uint32_t iova,
void etnaviv_iommu_destroy(struct etnaviv_iommu *mmu)
{
+ drm_mm_takedown(&mmu->mm);
iommu_domain_free(mmu->domain);
kfree(mmu);
}
@@ -107,6 +108,9 @@ struct etnaviv_iommu *etnaviv_iommu_new(struct drm_device *dev,
mmu->domain = domain;
mmu->dev = dev;
+
+ drm_mm_init(&mmu->mm, 0x80000000, SZ_1G);
+
iommu_set_fault_handler(domain, etnaviv_fault_handler, dev);
return mmu;
@@ -23,6 +23,9 @@
struct etnaviv_iommu {
struct drm_device *dev;
struct iommu_domain *domain;
+
+ /* memory manager for GPU address area */
+ struct drm_mm mm;
bool need_flush;
};