From patchwork Fri Jul 31 10:13:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Abriou X-Patchwork-Id: 6910221 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D840FC05AC for ; Fri, 31 Jul 2015 10:34:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CF77B205D1 for ; Fri, 31 Jul 2015 10:34:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AC056203B4 for ; Fri, 31 Jul 2015 10:34:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D2956E78C; Fri, 31 Jul 2015 03:34:04 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org X-Greylist: delayed 1226 seconds by postgrey-1.34 at gabe; Fri, 31 Jul 2015 03:34:02 PDT Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8F82D6E793 for ; Fri, 31 Jul 2015 03:34:02 -0700 (PDT) Received: from pps.filterd (m0046670.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.14.5/8.14.5) with SMTP id t6VACC2p022879; Fri, 31 Jul 2015 12:13:33 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 1vynjv4jpa-1 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 31 Jul 2015 12:13:33 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 67E1331; Fri, 31 Jul 2015 10:13:30 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 39FA1506D; Fri, 31 Jul 2015 10:13:32 +0000 (GMT) Received: from localhost (10.201.23.35) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 31 Jul 2015 12:13:32 +0200 From: Vincent Abriou To: Subject: [PATCH 1/4] drm/sti: fix dynamic z-ordering Date: Fri, 31 Jul 2015 12:13:24 +0200 Message-ID: <1438337607-13122-2-git-send-email-vincent.abriou@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438337607-13122-1-git-send-email-vincent.abriou@st.com> References: <1438337607-13122-1-git-send-email-vincent.abriou@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.35] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.14.151, 1.0.33, 0.0.0000 definitions=2015-07-31_05:2015-07-30, 2015-07-31, 1970-01-01 signatures=0 Cc: Fabien Dessenne , Benjamin Gaignard , kernel@stlinux.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Apply the plane depth when the plane is updated. If the depth is different from the previous plane update, the register controlling the plane depth is cleaned and updated with the new depth. Signed-off-by: Vincent Abriou Reviewed-by: Benjamin Gaignard --- drivers/gpu/drm/sti/sti_drm_plane.c | 23 +++++++++-------------- drivers/gpu/drm/sti/sti_mixer.c | 19 ++++++++++++++----- drivers/gpu/drm/sti/sti_mixer.h | 2 +- 3 files changed, 24 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/sti/sti_drm_plane.c b/drivers/gpu/drm/sti/sti_drm_plane.c index 64d4ed4..5427bc2 100644 --- a/drivers/gpu/drm/sti/sti_drm_plane.c +++ b/drivers/gpu/drm/sti/sti_drm_plane.c @@ -15,17 +15,16 @@ #include "sti_drm_plane.h" #include "sti_vtg.h" +/* (Background) < GDP0 < GDP1 < VID0 < VID1 < GDP2 < GDP3 < (ForeGround) */ enum sti_layer_desc sti_layer_default_zorder[] = { STI_GDP_0, - STI_VID_0, STI_GDP_1, + STI_VID_0, STI_VID_1, STI_GDP_2, STI_GDP_3, }; -/* (Background) < GDP0 < VID0 < GDP1 < VID1 < GDP2 < GDP3 < (ForeGround) */ - static int sti_drm_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, @@ -191,8 +190,7 @@ static const struct drm_plane_helper_funcs sti_drm_plane_helpers_funcs = { .atomic_disable = sti_drm_plane_atomic_disable, }; -static void sti_drm_plane_attach_zorder_property(struct drm_plane *plane, - uint64_t default_val) +static void sti_drm_plane_attach_zorder_property(struct drm_plane *plane) { struct drm_device *dev = plane->dev; struct sti_drm_private *private = dev->dev_private; @@ -201,16 +199,15 @@ static void sti_drm_plane_attach_zorder_property(struct drm_plane *plane, prop = private->plane_zorder_property; if (!prop) { - prop = drm_property_create_range(dev, 0, "zpos", 0, - GAM_MIXER_NB_DEPTH_LEVEL - 1); + prop = drm_property_create_range(dev, 0, "zpos", 1, + GAM_MIXER_NB_DEPTH_LEVEL); if (!prop) return; private->plane_zorder_property = prop; } - drm_object_attach_property(&plane->base, prop, default_val); - layer->zorder = default_val; + drm_object_attach_property(&plane->base, prop, layer->zorder); } struct drm_plane *sti_drm_plane_init(struct drm_device *dev, @@ -219,7 +216,6 @@ struct drm_plane *sti_drm_plane_init(struct drm_device *dev, enum drm_plane_type type) { int err, i; - uint64_t default_zorder = 0; err = drm_universal_plane_init(dev, &layer->plane, possible_crtcs, &sti_drm_plane_funcs, @@ -236,15 +232,14 @@ struct drm_plane *sti_drm_plane_init(struct drm_device *dev, if (sti_layer_default_zorder[i] == layer->desc) break; - default_zorder = i + 1; + layer->zorder = i + 1; if (type == DRM_PLANE_TYPE_OVERLAY) - sti_drm_plane_attach_zorder_property(&layer->plane, - default_zorder); + sti_drm_plane_attach_zorder_property(&layer->plane); DRM_DEBUG_DRIVER("drm plane:%d mapped to %s with zorder:%llu\n", layer->plane.base.id, - sti_layer_to_str(layer), default_zorder); + sti_layer_to_str(layer), layer->zorder); return &layer->plane; } diff --git a/drivers/gpu/drm/sti/sti_mixer.c b/drivers/gpu/drm/sti/sti_mixer.c index 13a4b84..61a2048 100644 --- a/drivers/gpu/drm/sti/sti_mixer.c +++ b/drivers/gpu/drm/sti/sti_mixer.c @@ -103,10 +103,11 @@ static void sti_mixer_set_background_area(struct sti_mixer *mixer, int sti_mixer_set_layer_depth(struct sti_mixer *mixer, struct sti_layer *layer) { - int layer_id = 0, depth = layer->zorder; + int layer_id, depth = layer->zorder; + unsigned int i; u32 mask, val; - if (depth >= GAM_MIXER_NB_DEPTH_LEVEL) + if ((depth < 1) || (depth > GAM_MIXER_NB_DEPTH_LEVEL)) return 1; switch (layer->desc) { @@ -136,15 +137,23 @@ int sti_mixer_set_layer_depth(struct sti_mixer *mixer, struct sti_layer *layer) DRM_ERROR("Unknown layer %d\n", layer->desc); return 1; } - mask = GAM_DEPTH_MASK_ID << (3 * depth); - layer_id = layer_id << (3 * depth); + + /* Search if a previous depth was already assigned to the layer */ + val = sti_mixer_reg_read(mixer, GAM_MIXER_CRB); + for (i = 0; i < GAM_MIXER_NB_DEPTH_LEVEL; i++) { + mask = GAM_DEPTH_MASK_ID << (3 * i); + if ((val & mask) == layer_id << (3 * i)) + break; + } + + mask |= GAM_DEPTH_MASK_ID << (3 * (depth - 1)); + layer_id = layer_id << (3 * (depth - 1)); DRM_DEBUG_DRIVER("%s %s depth=%d\n", sti_mixer_to_str(mixer), sti_layer_to_str(layer), depth); dev_dbg(mixer->dev, "GAM_MIXER_CRB val 0x%x mask 0x%x\n", layer_id, mask); - val = sti_mixer_reg_read(mixer, GAM_MIXER_CRB); val &= ~mask; val |= layer_id; sti_mixer_reg_write(mixer, GAM_MIXER_CRB, val); diff --git a/drivers/gpu/drm/sti/sti_mixer.h b/drivers/gpu/drm/sti/sti_mixer.h index b972821..eb663f6 100644 --- a/drivers/gpu/drm/sti/sti_mixer.h +++ b/drivers/gpu/drm/sti/sti_mixer.h @@ -49,7 +49,7 @@ int sti_mixer_active_video_area(struct sti_mixer *mixer, void sti_mixer_set_background_status(struct sti_mixer *mixer, bool enable); /* depth in Cross-bar control = z order */ -#define GAM_MIXER_NB_DEPTH_LEVEL 7 +#define GAM_MIXER_NB_DEPTH_LEVEL 6 #define STI_MIXER_MAIN 0 #define STI_MIXER_AUX 1