From patchwork Thu Aug 27 09:21:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hyungwon Hwang X-Patchwork-Id: 7082491 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 80B069F372 for ; Thu, 27 Aug 2015 09:21:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 885CD2099E for ; Thu, 27 Aug 2015 09:21:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 658C82099C for ; Thu, 27 Aug 2015 09:21:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B0C556E73F; Thu, 27 Aug 2015 02:21:46 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) by gabe.freedesktop.org (Postfix) with ESMTPS id 475AE6E73F for ; Thu, 27 Aug 2015 02:21:45 -0700 (PDT) Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NTQ021VEI06YC90@mailout4.samsung.com> for dri-devel@lists.freedesktop.org; Thu, 27 Aug 2015 18:21:42 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.116]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 67.F0.20564.6A6DED55; Thu, 27 Aug 2015 18:21:42 +0900 (KST) X-AuditID: cbfee690-f796f6d000005054-81-55ded6a679af Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id 7B.8A.07062.5A6DED55; Thu, 27 Aug 2015 18:21:41 +0900 (KST) Received: from localhost.localdomain.localdomain ([10.252.82.145]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NTQ00C46I02MD60@mmp2.samsung.com>; Thu, 27 Aug 2015 18:21:41 +0900 (KST) From: Hyungwon Hwang To: dri-devel@lists.freedesktop.org, inki.dae@samsung.com Subject: [PATCH v2] drm/exynos: implement atomic_{begin/flush} of DECON Date: Thu, 27 Aug 2015 18:21:14 +0900 Message-id: <1440667274-25327-1-git-send-email-human.hwang@samsung.com> X-Mailer: git-send-email 2.4.3 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrELMWRmVeSWpSXmKPExsWyRsSkRHfZtXuhBh2X2CyufH3PZrF0Rh+r xaT7E1gcmD3udx9n8ujbsooxgCmKyyYlNSezLLVI3y6BK+PNgVdsBV/VK1ZPW8/YwLhQsYuR k0NCwESi+9MnJghbTOLCvfVsXYxcHEICKxglZk19zQxTdP7pNWaIxCxGiV8HP7BAOG1MEruO TWIEqWIT0JNYcO0HO4gtImAp8WDrb7BuZgEdies3t4DZwgLuEqem/2QBsVkEVCU+v74CFucF iq/72AB1hpzEufVfwBZICJxhk/jxeiIjRIOAxLfJh4ASHEAJWYlNB6Cuk5Q4uOIGywRGwQWM DKsYRVMLkguKk9KLTPSKE3OLS/PS9ZLzczcxAoPu9L9nE3Yw3jtgfYhRgINRiYdXIuNeqBBr YllxZe4hRlOgDROZpUST84GhnVcSb2hsZmRhamJqbGRuaaYkzvta6mewkEB6YklqdmpqQWpR fFFpTmrxIUYmDk6pBsbU5ZsFVqQcuVj9tPLMD7Ptu+zSlziLM23zP2piFRZme0rs9xEl6/qT 5/WTqhly3hx4vPPXns+Pj5asvJF15WGFU2pwzYoJCnZvzsZzlkxllXo6+U2EF3NL2KG4ttJM wU8V+5zaQtuCOWwyXVOcN5T+e70gUU/JmH/+l8A5mp8e5FwQUtv3ZJ4SS3FGoqEWc1FxIgCt lCjENQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsVy+t9jQd2l1+6FGrS9tLG48vU9m8XSGX2s FpPuT2BxYPa4332cyaNvyyrGAKaoBkabjNTElNQihdS85PyUzLx0WyXv4HjneFMzA0NdQ0sL cyWFvMTcVFslF58AXbfMHKAtSgpliTmlQKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDC GsaMNwdesRV8Va9YPW09YwPjQsUuRk4OCQETifNPrzFD2GISF+6tZ+ti5OIQEpjFKPHr4AcW CKeNSWLXsUmMIFVsAnoSC679YAexRQQsJR5s/Q3WzSygI3H95hYwW1jAXeLU9J8sIDaLgKrE 59dXwOK8QPF1HxuYILbJSZxb/4VlAiP3AkaGVYwSqQXJBcVJ6blGeanlesWJucWleel6yfm5 mxjBgf1Megfj4V3uhxgFOBiVeHglMu6FCrEmlhVX5h5ilOBgVhLh3X8MKMSbklhZlVqUH19U mpNafIjRFOiAicxSosn5wKjLK4k3NDYxM7I0Mje0MDI2VxLn1TfZFCokkJ5YkpqdmlqQWgTT x8TBKdXAGJN5qbN804O/sQr7bize0aBxvtSnrrRerU2ea3Gq5pm4FydX/Noco/gl2s849dcy sfMXXZJ2ud0uU+rbceZA93/ZiWvXLj8YwSN7uSI+7N+ZynczSxQLtl7gYIs4ap0Y2/b7wKtj 6i0TKxUDL/8/sU7GtOj1G0aXz/MClC1Y2C997Ep4L3stRYmlOCPRUIu5qDgRAG1Vl+CCAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Each CRTC's atomic_{begin/flush} must stop/start the update of shadow registers to active register in the functions. This patch achieves these purpose by moving the setting of protection bits to those functions from decon_update_plane. v2: rebased to the branch exynos-drm-next Signed-off-by: Hyungwon Hwang Reviewed-by: Daniel Stone --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 34 +++++++++++++++++++++------ drivers/gpu/drm/exynos/exynos7_drm_decon.c | 30 ++++++++++++++++++----- 2 files changed, 51 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 8d65e45..f24dc2d 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -219,6 +219,17 @@ static void decon_shadow_protect_win(struct decon_context *ctx, int win, writel(val, ctx->addr + DECON_SHADOWCON); } +static void decon_atomic_begin(struct exynos_drm_crtc *crtc, + struct exynos_drm_plane *plane) +{ + struct decon_context *ctx = crtc->ctx; + + if (ctx->suspended) + return; + + decon_shadow_protect_win(ctx, plane->zpos, true); +} + static void decon_update_plane(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane) { @@ -232,8 +243,6 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, if (ctx->suspended) return; - decon_shadow_protect_win(ctx, win, true); - val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y); writel(val, ctx->addr + DECON_VIDOSDxA(win)); @@ -265,15 +274,10 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, val |= WINCONx_ENWIN_F; writel(val, ctx->addr + DECON_WINCONx(win)); - decon_shadow_protect_win(ctx, win, false); - /* standalone update */ val = readl(ctx->addr + DECON_UPDATE); val |= STANDALONE_UPDATE_F; writel(val, ctx->addr + DECON_UPDATE); - - if (ctx->i80_if) - atomic_set(&ctx->win_updated, 1); } static void decon_disable_plane(struct exynos_drm_crtc *crtc, @@ -301,6 +305,20 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, writel(val, ctx->addr + DECON_UPDATE); } +static void decon_atomic_flush(struct exynos_drm_crtc *crtc, + struct exynos_drm_plane *plane) +{ + struct decon_context *ctx = crtc->ctx; + + if (ctx->suspended) + return; + + decon_shadow_protect_win(ctx, plane->zpos, false); + + if (ctx->i80_if) + atomic_set(&ctx->win_updated, 1); +} + static void decon_swreset(struct decon_context *ctx) { unsigned int tries; @@ -455,8 +473,10 @@ static struct exynos_drm_crtc_ops decon_crtc_ops = { .enable_vblank = decon_enable_vblank, .disable_vblank = decon_disable_vblank, .commit = decon_commit, + .atomic_begin = decon_atomic_begin, .update_plane = decon_update_plane, .disable_plane = decon_disable_plane, + .atomic_flush = decon_atomic_flush, .te_handler = decon_te_irq_handler, }; diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c index 7651499..c74e30e 100644 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c @@ -383,6 +383,17 @@ static void decon_shadow_protect_win(struct decon_context *ctx, writel(val, ctx->regs + SHADOWCON); } +static void decon_atomic_begin(struct exynos_drm_crtc *crtc, + struct exynos_drm_plane *plane) +{ + struct decon_context *ctx = crtc->ctx; + + if (ctx->suspended) + return; + + decon_shadow_protect_win(ctx, plane->zpos, true); +} + static void decon_update_plane(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane) { @@ -410,9 +421,6 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, * is set. */ - /* protect windows */ - decon_shadow_protect_win(ctx, win, true); - /* buffer start address */ val = (unsigned long)plane->dma_addr[0]; writel(val, ctx->regs + VIDW_BUF_START(win)); @@ -510,14 +518,22 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, val &= ~WINCONx_ENWIN; writel(val, ctx->regs + WINCON(win)); - /* unprotect windows */ - decon_shadow_protect_win(ctx, win, false); - val = readl(ctx->regs + DECON_UPDATE); val |= DECON_UPDATE_STANDALONE_F; writel(val, ctx->regs + DECON_UPDATE); } +static void decon_atomic_flush(struct exynos_drm_crtc *crtc, + struct exynos_drm_plane *plane) +{ + struct decon_context *ctx = crtc->ctx; + + if (ctx->suspended) + return; + + decon_shadow_protect_win(ctx, plane->zpos, false); +} + static void decon_init(struct decon_context *ctx) { u32 val; @@ -614,8 +630,10 @@ static const struct exynos_drm_crtc_ops decon_crtc_ops = { .enable_vblank = decon_enable_vblank, .disable_vblank = decon_disable_vblank, .wait_for_vblank = decon_wait_for_vblank, + .atomic_begin = decon_atomic_begin, .update_plane = decon_update_plane, .disable_plane = decon_disable_plane, + .atomic_flush = decon_atomic_flush, };