From patchwork Wed Nov 18 11:19:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 7648201 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 98FB9BF90C for ; Wed, 18 Nov 2015 11:19:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 92D7D20631 for ; Wed, 18 Nov 2015 11:19:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4A6BA2060C for ; Wed, 18 Nov 2015 11:19:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A8D2572145; Wed, 18 Nov 2015 03:19:26 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 58FF97214E for ; Wed, 18 Nov 2015 03:19:25 -0800 (PST) Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 28E6A1416FD; Wed, 18 Nov 2015 11:19:25 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 17C4C1416FF; Wed, 18 Nov 2015 11:19:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (unknown [202.46.23.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 2AED41416FD; Wed, 18 Nov 2015 11:19:23 +0000 (UTC) From: Archit Taneja To: dri-devel@lists.freedesktop.org, robdclark@gmail.com Subject: [PATCH 3/6] dt-bindings: drm/msm: Update MDP bindings Date: Wed, 18 Nov 2015 16:49:04 +0530 Message-Id: <1447845547-6801-4-git-send-email-architt@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1447845547-6801-1-git-send-email-architt@codeaurora.org> References: <1447845547-6801-1-git-send-email-architt@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Cc: linux-arm-msm@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Update DT bindings for mdp. We now have a more uniform and future-proof set of compatible strings. MDP5 bindings were missing. Add those and update details on the clock-names properties. Signed-off-by: Archit Taneja --- .../devicetree/bindings/display/msm/mdp.txt | 26 +++++++++++++++------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/mdp.txt b/Documentation/devicetree/bindings/display/msm/mdp.txt index 0833eda..a214f6c 100644 --- a/Documentation/devicetree/bindings/display/msm/mdp.txt +++ b/Documentation/devicetree/bindings/display/msm/mdp.txt @@ -2,18 +2,28 @@ Qualcomm adreno/snapdragon display controller Required properties: - compatible: - * "qcom,mdp" - mdp4 + * "qcom,mdp4" - mdp4 + * "qcom,mdp5" - mdp5 - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt signal from the display controller. - connectors: array of phandles for output device(s) - clocks: device clocks See ../clocks/clock-bindings.txt for details. -- clock-names: the following clocks are required: - * "core_clk" - * "iface_clk" - * "src_clk" - * "hdmi_clk" - * "mpd_clk" +- clock-names: the following clocks are required. + For MDP4: + * "core_clk" + * "iface_clk" + * "lut_clk" + * "src_clk" + * "hdmi_clk" + * "mdp_clk" + For MDP5: + * "bus_clk" + * "iface_clk" + * "core_clk_src" + * "core_clk" + * "lut_clk" (some MDP5 versions may not need this) + * "vsync_clk" Optional properties: - gpus: phandle for gpu device @@ -26,7 +36,7 @@ Example: ... mdp: qcom,mdp@5100000 { - compatible = "qcom,mdp"; + compatible = "qcom,mdp4"; reg = <0x05100000 0xf0000>; interrupts = ; connectors = <&hdmi>;