| Message ID | 1454133574-20527-2-git-send-email-oded.gabbay@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 30.01.2016 14:59, Oded Gabbay wrote: > Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> > --- > drivers/gpu/drm/radeon/radeon_object.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c > index 84d4563..255faf6 100644 > --- a/drivers/gpu/drm/radeon/radeon_object.c > +++ b/drivers/gpu/drm/radeon/radeon_object.c > @@ -33,6 +33,7 @@ > #include <linux/slab.h> > #include <drm/drmP.h> > #include <drm/radeon_drm.h> > +#include <drm/drm_cache.h> > #include "radeon.h" > #include "radeon_trace.h" > > @@ -245,6 +246,13 @@ int radeon_bo_create(struct radeon_device *rdev, > DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " > "better performance thanks to write-combining\n"); > bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); > +#else > + /* > + * For architectures that don't support WC memory, > + * mask out the WC flag from the BO > + */ > + if (!drm_arch_can_wc_memory()) > + bo->flags &= ~RADEON_GEM_GTT_WC; > #endif For consistency with existing multi-line comments, please start the comment on the opening line: /* For architectures that don't support WC memory, * mask out the WC flag from the BO */ With that fixed (in patch 3 as well), the series is Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
On Sat, Jan 30, 2016 at 10:11 AM, Michel Dänzer <michel@daenzer.net> wrote: > On 30.01.2016 14:59, Oded Gabbay wrote: >> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> >> --- >> drivers/gpu/drm/radeon/radeon_object.c | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c >> index 84d4563..255faf6 100644 >> --- a/drivers/gpu/drm/radeon/radeon_object.c >> +++ b/drivers/gpu/drm/radeon/radeon_object.c >> @@ -33,6 +33,7 @@ >> #include <linux/slab.h> >> #include <drm/drmP.h> >> #include <drm/radeon_drm.h> >> +#include <drm/drm_cache.h> >> #include "radeon.h" >> #include "radeon_trace.h" >> >> @@ -245,6 +246,13 @@ int radeon_bo_create(struct radeon_device *rdev, >> DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " >> "better performance thanks to write-combining\n"); >> bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); >> +#else >> + /* >> + * For architectures that don't support WC memory, >> + * mask out the WC flag from the BO >> + */ >> + if (!drm_arch_can_wc_memory()) >> + bo->flags &= ~RADEON_GEM_GTT_WC; >> #endif > > For consistency with existing multi-line comments, please start the > comment on the opening line: > > /* For architectures that don't support WC memory, > * mask out the WC flag from the BO > */ > > With that fixed (in patch 3 as well), the series is > > Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> > > > -- > Earthling Michel Dänzer | http://www.amd.com > Libre software enthusiast | Mesa and X developer Kernel coding style says differently...
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 84d4563..255faf6 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -33,6 +33,7 @@ #include <linux/slab.h> #include <drm/drmP.h> #include <drm/radeon_drm.h> +#include <drm/drm_cache.h> #include "radeon.h" #include "radeon_trace.h" @@ -245,6 +246,13 @@ int radeon_bo_create(struct radeon_device *rdev, DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " "better performance thanks to write-combining\n"); bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); +#else + /* + * For architectures that don't support WC memory, + * mask out the WC flag from the BO + */ + if (!drm_arch_can_wc_memory()) + bo->flags &= ~RADEON_GEM_GTT_WC; #endif radeon_ttm_placement_from_domain(bo, domain);
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> --- drivers/gpu/drm/radeon/radeon_object.c | 8 ++++++++ 1 file changed, 8 insertions(+)