From patchwork Fri Feb 12 08:56:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Abriou X-Patchwork-Id: 8288741 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 36031BEEE5 for ; Fri, 12 Feb 2016 08:56:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3297F203DA for ; Fri, 12 Feb 2016 08:56:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8549C203E3 for ; Fri, 12 Feb 2016 08:56:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F7747A131; Fri, 12 Feb 2016 00:56:18 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 191137A12C for ; Fri, 12 Feb 2016 00:56:13 -0800 (PST) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id u1C8qFVu005347; Fri, 12 Feb 2016 09:56:11 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 20w8kg2ufc-1 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 12 Feb 2016 09:56:11 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4F05234; Fri, 12 Feb 2016 08:55:18 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9E42010F5; Fri, 12 Feb 2016 08:56:10 +0000 (GMT) Received: from localhost (10.201.23.35) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 12 Feb 2016 09:56:10 +0100 From: Vincent Abriou To: Subject: [PATCH 5/5] drm/sti: adapt YUV colorspace in display pipeline Date: Fri, 12 Feb 2016 09:56:00 +0100 Message-ID: <1455267360-32340-6-git-send-email-vincent.abriou@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455267360-32340-1-git-send-email-vincent.abriou@st.com> References: <1455267360-32340-1-git-send-email-vincent.abriou@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.35] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-02-12_05:, , signatures=0 Cc: Bich Hemon , Vincent Abriou , Fabien Dessenne , Benjamin Gaignard X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bich Hemon Use BT601 for SD/ED resolution and BT709 for HD resolution Signed-off-by: Bich Hemon --- drivers/gpu/drm/sti/sti_tvout.c | 61 ++++++++++++++++++++++++++--------------- drivers/gpu/drm/sti/sti_vid.c | 31 +++++++++++++++++---- 2 files changed, 64 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/sti/sti_tvout.c b/drivers/gpu/drm/sti/sti_tvout.c index 4c52259..1c27a2c 100644 --- a/drivers/gpu/drm/sti/sti_tvout.c +++ b/drivers/gpu/drm/sti/sti_tvout.c @@ -95,6 +95,8 @@ #define ENCODER_CRTC_MASK (BIT(0) | BIT(1)) +#define TVO_MIN_HD_HEIGHT 720 + /* enum listing the supported output data format */ enum sti_tvout_video_out_type { STI_TVOUT_VIDEO_OUT_RGB, @@ -258,6 +260,31 @@ static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout, } /** + * Set preformatter matrix + * + * @tvout: tvout structure + * @mode: display mode structure + */ +static void tvout_preformatter_set_matrix(struct sti_tvout *tvout, + struct drm_display_mode *mode) +{ + unsigned int i; + const u32 *pf_matrix; + + if (mode->vdisplay >= TVO_MIN_HD_HEIGHT) + pf_matrix = rgb_to_ycbcr_709; + else + pf_matrix = rgb_to_ycbcr_601; + + for (i = 0; i < 8; i++) { + tvout_write(tvout, *(pf_matrix + i), + TVO_CSC_MAIN_M0 + (i * 4)); + tvout_write(tvout, *(pf_matrix + i), + TVO_CSC_AUX_M0 + (i * 4)); + } +} + +/** * Start VIP block for DVO output * * @tvout: pointer on tvout structure @@ -454,10 +481,6 @@ static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder, { } -static void sti_tvout_encoder_prepare(struct drm_encoder *encoder) -{ -} - static void sti_tvout_encoder_destroy(struct drm_encoder *encoder) { struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder); @@ -470,10 +493,12 @@ static const struct drm_encoder_funcs sti_tvout_encoder_funcs = { .destroy = sti_tvout_encoder_destroy, }; -static void sti_dvo_encoder_commit(struct drm_encoder *encoder) +static void sti_dvo_encoder_enable(struct drm_encoder *encoder) { struct sti_tvout *tvout = to_sti_tvout(encoder); + tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); + tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc)); } @@ -489,8 +514,7 @@ static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = { .dpms = sti_tvout_encoder_dpms, .mode_fixup = sti_tvout_encoder_mode_fixup, .mode_set = sti_tvout_encoder_mode_set, - .prepare = sti_tvout_encoder_prepare, - .commit = sti_dvo_encoder_commit, + .enable = sti_dvo_encoder_enable, .disable = sti_dvo_encoder_disable, }; @@ -521,10 +545,12 @@ sti_tvout_create_dvo_encoder(struct drm_device *dev, return drm_encoder; } -static void sti_hda_encoder_commit(struct drm_encoder *encoder) +static void sti_hda_encoder_enable(struct drm_encoder *encoder) { struct sti_tvout *tvout = to_sti_tvout(encoder); + tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); + tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc)); } @@ -543,8 +569,7 @@ static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = { .dpms = sti_tvout_encoder_dpms, .mode_fixup = sti_tvout_encoder_mode_fixup, .mode_set = sti_tvout_encoder_mode_set, - .prepare = sti_tvout_encoder_prepare, - .commit = sti_hda_encoder_commit, + .commit = sti_hda_encoder_enable, .disable = sti_hda_encoder_disable, }; @@ -573,10 +598,12 @@ static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev, return drm_encoder; } -static void sti_hdmi_encoder_commit(struct drm_encoder *encoder) +static void sti_hdmi_encoder_enable(struct drm_encoder *encoder) { struct sti_tvout *tvout = to_sti_tvout(encoder); + tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); + tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc)); } @@ -592,8 +619,7 @@ static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = { .dpms = sti_tvout_encoder_dpms, .mode_fixup = sti_tvout_encoder_mode_fixup, .mode_set = sti_tvout_encoder_mode_set, - .prepare = sti_tvout_encoder_prepare, - .commit = sti_hdmi_encoder_commit, + .commit = sti_hdmi_encoder_enable, .disable = sti_hdmi_encoder_disable, }; @@ -645,18 +671,9 @@ static int sti_tvout_bind(struct device *dev, struct device *master, void *data) { struct sti_tvout *tvout = dev_get_drvdata(dev); struct drm_device *drm_dev = data; - unsigned int i; tvout->drm_dev = drm_dev; - /* set preformatter matrix */ - for (i = 0; i < 8; i++) { - tvout_write(tvout, rgb_to_ycbcr_601[i], - TVO_CSC_MAIN_M0 + (i * 4)); - tvout_write(tvout, rgb_to_ycbcr_601[i], - TVO_CSC_AUX_M0 + (i * 4)); - } - sti_tvout_create_encoders(drm_dev, tvout); return 0; diff --git a/drivers/gpu/drm/sti/sti_vid.c b/drivers/gpu/drm/sti/sti_vid.c index a8254cc..0a1e50c 100644 --- a/drivers/gpu/drm/sti/sti_vid.c +++ b/drivers/gpu/drm/sti/sti_vid.c @@ -42,6 +42,17 @@ #define VID_MPR1_BT709 0x0AC50000 #define VID_MPR2_BT709 0x07150545 #define VID_MPR3_BT709 0x00000AE8 +/* YCbCr to RGB BT709: + * R = Y+1.3711Cr + * G = Y-0.6992Cr-0.3359Cb + * B = Y+1.7344Cb + */ +#define VID_MPR0_BT601 0x0A800000 +#define VID_MPR1_BT601 0x0AAF0000 +#define VID_MPR2_BT601 0x094E0754 +#define VID_MPR3_BT601 0x00000ADD + +#define VID_MIN_HD_HEIGHT 720 void sti_vid_commit(struct sti_vid *vid, struct drm_plane_state *state) @@ -52,6 +63,7 @@ void sti_vid_commit(struct sti_vid *vid, int dst_y = state->crtc_y; int dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x); int dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y); + int src_h = state->src_h >> 16; u32 val, ydo, xdo, yds, xds; /* Input / output size @@ -71,6 +83,19 @@ void sti_vid_commit(struct sti_vid *vid, writel((ydo << 16) | xdo, vid->regs + VID_VPO); writel((yds << 16) | xds, vid->regs + VID_VPS); + + /* Color conversion parameters */ + if (src_h >= VID_MIN_HD_HEIGHT) { + writel(VID_MPR0_BT709, vid->regs + VID_MPR0); + writel(VID_MPR1_BT709, vid->regs + VID_MPR1); + writel(VID_MPR2_BT709, vid->regs + VID_MPR2); + writel(VID_MPR3_BT709, vid->regs + VID_MPR3); + } else { + writel(VID_MPR0_BT601, vid->regs + VID_MPR0); + writel(VID_MPR1_BT601, vid->regs + VID_MPR1); + writel(VID_MPR2_BT601, vid->regs + VID_MPR2); + writel(VID_MPR3_BT601, vid->regs + VID_MPR3); + } } void sti_vid_disable(struct sti_vid *vid) @@ -91,12 +116,6 @@ static void sti_vid_init(struct sti_vid *vid) /* Opaque */ writel(VID_ALP_OPAQUE, vid->regs + VID_ALP); - /* Color conversion parameters */ - writel(VID_MPR0_BT709, vid->regs + VID_MPR0); - writel(VID_MPR1_BT709, vid->regs + VID_MPR1); - writel(VID_MPR2_BT709, vid->regs + VID_MPR2); - writel(VID_MPR3_BT709, vid->regs + VID_MPR3); - /* Brightness, contrast, tint, saturation */ writel(VID_BC_DFLT, vid->regs + VID_BC); writel(VID_TINT_DFLT, vid->regs + VID_TINT);