From patchwork Fri Feb 12 09:05:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Abriou X-Patchwork-Id: 8288791 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E71509F3CD for ; Fri, 12 Feb 2016 09:06:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1678E203E5 for ; Fri, 12 Feb 2016 09:06:16 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1DB1C202D1 for ; Fri, 12 Feb 2016 09:06:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4503F7A137; Fri, 12 Feb 2016 01:06:13 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id E45107A136 for ; Fri, 12 Feb 2016 01:06:09 -0800 (PST) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id u1C93gb1006182; Fri, 12 Feb 2016 10:06:07 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 20w6u9b716-1 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 12 Feb 2016 10:06:07 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7E76541; Fri, 12 Feb 2016 09:05:14 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9F9841134; Fri, 12 Feb 2016 09:06:06 +0000 (GMT) Received: from localhost (10.201.23.35) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 12 Feb 2016 10:06:05 +0100 From: Vincent Abriou To: Subject: [PATCH 05/11] drm/sti: fix dvo data_enable signal Date: Fri, 12 Feb 2016 10:05:49 +0100 Message-ID: <1455267955-32657-6-git-send-email-vincent.abriou@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455267955-32657-1-git-send-email-vincent.abriou@st.com> References: <1455267955-32657-1-git-send-email-vincent.abriou@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.35] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-02-12_05:, , signatures=0 Cc: Bich Hemon , Vincent Abriou , Fabien Dessenne , Benjamin Gaignard X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bich Hemon Modify AWG algorithm in order to handle more than 1023 lines Signed-off-by: Bich Hemon --- drivers/gpu/drm/sti/sti_awg_utils.c | 51 +++++++++++++++++++++++++------------ 1 file changed, 35 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/sti/sti_awg_utils.c b/drivers/gpu/drm/sti/sti_awg_utils.c index 2378b93..a516eb8 100644 --- a/drivers/gpu/drm/sti/sti_awg_utils.c +++ b/drivers/gpu/drm/sti/sti_awg_utils.c @@ -7,6 +7,7 @@ #include "sti_awg_utils.h" #define AWG_OPCODE_OFFSET 10 +#define AWG_MAX_ARG 0x3ff enum opcode { SET, @@ -67,7 +68,7 @@ static int awg_generate_instr(enum opcode opcode, mux = 0; data_enable = 0; - arg &= (0x3ff); + arg &= AWG_MAX_ARG; break; case REPEAT: case REPLAY: @@ -78,13 +79,13 @@ static int awg_generate_instr(enum opcode opcode, mux = 0; data_enable = 0; - arg &= (0x3ff); + arg &= AWG_MAX_ARG; break; case JUMP: mux = 0; data_enable = 0; arg |= 0x40; /* for jump instruction 7th bit is 1 */ - arg &= 0x3ff; + arg &= AWG_MAX_ARG; break; case STOP: arg = 0; @@ -112,22 +113,13 @@ static int awg_generate_instr(enum opcode opcode, return 0; } -int sti_awg_generate_code_data_enable_mode( +static int awg_generate_line_signal( struct awg_code_generation_params *fwparams, struct awg_timing *timing) { long int val; int ret = 0; - if (timing->trailing_lines > 0) { - /* skip trailing lines */ - val = timing->blanking_level; - ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams); - - val = timing->trailing_lines - 1; - ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams); - } - if (timing->trailing_pixels > 0) { /* skip trailing pixel */ val = timing->blanking_level; @@ -152,9 +144,36 @@ int sti_awg_generate_code_data_enable_mode( ret |= awg_generate_instr(SET, val, 0, 0, fwparams); } - /* replay the sequence as many active lines defined */ - val = timing->active_lines - 1; - ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams); + return ret; +} + +int sti_awg_generate_code_data_enable_mode( + struct awg_code_generation_params *fwparams, + struct awg_timing *timing) +{ + long int val, tmp_val; + int ret = 0; + + if (timing->trailing_lines > 0) { + /* skip trailing lines */ + val = timing->blanking_level; + ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams); + + val = timing->trailing_lines - 1; + ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams); + } + + tmp_val = timing->active_lines - 1; + + while (tmp_val > 0) { + /* generate DE signal for each line */ + ret |= awg_generate_line_signal(fwparams, timing); + /* replay the sequence as many active lines defined */ + ret |= awg_generate_instr(REPLAY, + min_t(int, AWG_MAX_ARG, tmp_val), + 0, 0, fwparams); + tmp_val -= AWG_MAX_ARG; + } if (timing->blanking_lines > 0) { /* skip blanking lines */