From patchwork Fri Feb 12 09:14:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Abriou X-Patchwork-Id: 8288901 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6AC209F6E4 for ; Fri, 12 Feb 2016 09:14:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80E56203E5 for ; Fri, 12 Feb 2016 09:14:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7795F203B0 for ; Fri, 12 Feb 2016 09:14:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3873E7A13F; Fri, 12 Feb 2016 01:14:28 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id D6E517A13F for ; Fri, 12 Feb 2016 01:14:26 -0800 (PST) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id u1C9CPpn018275; Fri, 12 Feb 2016 10:14:23 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 20w8kg2wt2-1 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 12 Feb 2016 10:14:23 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5AAA534; Fri, 12 Feb 2016 09:13:30 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8039C104D; Fri, 12 Feb 2016 09:14:22 +0000 (GMT) Received: from localhost (10.201.23.35) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 12 Feb 2016 10:14:22 +0100 From: Vincent Abriou To: Subject: [PATCH 03/10] drm/sti: add debugfs entries for HDA connector Date: Fri, 12 Feb 2016 10:14:02 +0100 Message-ID: <1455268449-686-4-git-send-email-vincent.abriou@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455268449-686-1-git-send-email-vincent.abriou@st.com> References: <1455268449-686-1-git-send-email-vincent.abriou@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.35] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-02-12_05:, , signatures=0 Cc: Vincent Abriou , Fabien Dessenne , Benjamin Gaignard X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Vincent Abriou --- drivers/gpu/drm/sti/sti_hda.c | 105 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 104 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c index 293a133..ec0d017 100644 --- a/drivers/gpu/drm/sti/sti_hda.c +++ b/drivers/gpu/drm/sti/sti_hda.c @@ -326,6 +326,103 @@ static void hda_enable_hd_dacs(struct sti_hda *hda, bool enable) } } +#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ + readl(hda->regs + reg)) + +static void hda_dbg_cfg(struct seq_file *s, int val) +{ + seq_puts(s, "\tAWG "); + seq_puts(s, val & CFG_AWG_ASYNC_EN ? "enabled" : "disabled"); +} + +static void hda_dbg_awg_microcode(struct seq_file *s, void __iomem *reg) +{ + unsigned int i; + + seq_puts(s, "\n\n"); + seq_puts(s, " HDA AWG microcode:"); + for (i = 0; i < AWG_MAX_INST; i++) { + if (i % 8 == 0) + seq_printf(s, "\n %04X:", i); + seq_printf(s, " %04X", readl(reg + i * 4)); + } +} + +static void hda_dbg_video_dacs_ctrl(struct seq_file *s, void __iomem *reg) +{ + u32 val = readl(reg); + u32 mask; + + switch ((u32)reg & VIDEO_DACS_CONTROL_MASK) { + case VIDEO_DACS_CONTROL_SYSCFG2535: + mask = DAC_CFG_HD_OFF_MASK; + break; + case VIDEO_DACS_CONTROL_SYSCFG5072: + mask = DAC_CFG_HD_HZUVW_OFF_MASK; + break; + default: + DRM_DEBUG_DRIVER("Warning: DACS ctrl register not supported!"); + return; + } + + seq_puts(s, "\n"); + seq_printf(s, "\n %-25s 0x%08X", "VIDEO_DACS_CONTROL", val); + seq_puts(s, "\tHD DACs "); + seq_puts(s, val & mask ? "disabled" : "enabled"); +} + +static int hda_dbg_show(struct seq_file *s, void *data) +{ + struct drm_info_node *node = s->private; + struct sti_hda *hda = (struct sti_hda *)node->info_ent->data; + struct drm_device *dev = node->minor->dev; + int ret; + + ret = mutex_lock_interruptible(&dev->struct_mutex); + if (ret) + return ret; + + seq_printf(s, "HD Analog: (vaddr = 0x%p)", hda->regs); + DBGFS_DUMP(HDA_ANA_CFG); + hda_dbg_cfg(s, readl(hda->regs + HDA_ANA_CFG)); + DBGFS_DUMP(HDA_ANA_SCALE_CTRL_Y); + DBGFS_DUMP(HDA_ANA_SCALE_CTRL_CB); + DBGFS_DUMP(HDA_ANA_SCALE_CTRL_CR); + DBGFS_DUMP(HDA_ANA_ANC_CTRL); + DBGFS_DUMP(HDA_ANA_SRC_Y_CFG); + DBGFS_DUMP(HDA_ANA_SRC_C_CFG); + hda_dbg_awg_microcode(s, hda->regs + HDA_SYNC_AWGI); + if (hda->video_dacs_ctrl) + hda_dbg_video_dacs_ctrl(s, hda->video_dacs_ctrl); + seq_puts(s, "\n"); + + mutex_unlock(&dev->struct_mutex); + return 0; +} + +static struct drm_info_list hda_debugfs_files[] = { + { "hda", hda_dbg_show, 0, NULL }, +}; + +static void hda_debugfs_exit(struct sti_hda *hda, struct drm_minor *minor) +{ + drm_debugfs_remove_files(hda_debugfs_files, + ARRAY_SIZE(hda_debugfs_files), + minor); +} + +static int hda_debugfs_init(struct sti_hda *hda, struct drm_minor *minor) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(hda_debugfs_files); i++) + hda_debugfs_files[i].data = hda; + + return drm_debugfs_create_files(hda_debugfs_files, + ARRAY_SIZE(hda_debugfs_files), + minor->debugfs_root, minor); +} + /** * Configure AWG, writing instructions * @@ -688,6 +785,9 @@ static int sti_hda_bind(struct device *dev, struct device *master, void *data) /* force to disable hd dacs at startup */ hda_enable_hd_dacs(hda, false); + if (hda_debugfs_init(hda, drm_dev->primary)) + DRM_ERROR("HDA debugfs setup failed\n"); + return 0; err_sysfs: @@ -700,7 +800,10 @@ err_connector: static void sti_hda_unbind(struct device *dev, struct device *master, void *data) { - /* do nothing */ + struct sti_hda *hda = dev_get_drvdata(dev); + struct drm_device *drm_dev = data; + + hda_debugfs_exit(hda, drm_dev->primary); } static const struct component_ops sti_hda_ops = {