From patchwork Fri Mar 4 10:54:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xinliang Liu X-Patchwork-Id: 8502551 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CD7F6C0553 for ; Fri, 4 Mar 2016 11:03:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B7E98201C8 for ; Fri, 4 Mar 2016 11:03:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A6246200F3 for ; Fri, 4 Mar 2016 11:03:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C739B6E09D; Fri, 4 Mar 2016 11:03:27 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf0-x231.google.com (mail-pf0-x231.google.com [IPv6:2607:f8b0:400e:c00::231]) by gabe.freedesktop.org (Postfix) with ESMTPS id E9D8F6E07B for ; Fri, 4 Mar 2016 10:55:50 +0000 (UTC) Received: by mail-pf0-x231.google.com with SMTP id 4so33689493pfd.1 for ; Fri, 04 Mar 2016 02:55:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+twjNBuZjyydlli4CiMpo+yJIIV6s8N37GCpz6EvVTo=; b=eT9ILG3qiVm+omnw0NcOXGTiubZ91MO0MAWVqkkqx26aZ7HgbJjNg3+x1+Czri2NDH AA6a6tGhEz+3JD6ydDzvNMxl7SwwpBbAMpmmijYIXgP5CDC5KTQEa2/uLcLWnT46Jazp NZYH4AYN8JrQpzECa2ihWjyWW7Bo7fsSeEGLY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+twjNBuZjyydlli4CiMpo+yJIIV6s8N37GCpz6EvVTo=; b=KENXUNjtTKxn792IcfNlLD9g9ao+Mk4jJVafrFbevlh2G6ZVuX5m1D2Nerbmfhuqb1 ws4Q7+rczqA7bNgX72tS5rueHl6RQpnbXZv+L6tfL3fUXrCl/HGuU5b/SnkfdfHngAFR EfPDU+yLM2Vhd29w/tizMMdlVfgS4VcIkVTuzspMQqvS3LMzVy+MGYmvhBwvW60XRhC4 77/897zvz0qchBeD4CvUGXFynMHoOlgJ/fUcLqM3HGSECJrpLQmdkEg6KKZlnk5FAH3h cr+VUC6ZFGkBGLYANqRzMLbQ0NGUOX/9LMx4nt58Y/wUoymKRPsZ92XhadCNkMwCJX4q hfSg== X-Gm-Message-State: AD7BkJIzdRlcgkOl19LteykaEEQhCjR9Rp1LUx3mApakQBdPxCIaupmLXmywX8ApV3kAFWF/ X-Received: by 10.98.80.22 with SMTP id e22mr10854743pfb.15.1457088950415; Fri, 04 Mar 2016 02:55:50 -0800 (PST) Received: from localhost.localdomain ([116.25.57.242]) by smtp.gmail.com with ESMTPSA id c68sm4668805pfj.41.2016.03.04.02.55.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 04 Mar 2016 02:55:49 -0800 (PST) From: Xinliang Liu To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, daniel@ffwll.ch, robh@kernel.org, daniel@fooishbar.org, architt@codeaurora.org, airlied@linux.ie, corbet@lwn.net, catalin.marinas@arm.com, will.deacon@arm.com, emil.l.velikov@gmail.com, mark.rutland@arm.com Subject: [PATCH v7 01/11] drm/hisilicon: Add device tree binding for hi6220 display subsystem Date: Fri, 4 Mar 2016 18:54:27 +0800 Message-Id: <1457088877-131022-2-git-send-email-xinliang.liu@linaro.org> X-Mailer: git-send-email 2.7.1 In-Reply-To: <1457088877-131022-1-git-send-email-xinliang.liu@linaro.org> References: <1457088877-131022-1-git-send-email-xinliang.liu@linaro.org> X-Mailman-Approved-At: Fri, 04 Mar 2016 11:03:23 +0000 Cc: andy.green@linaro.org, xuyiping@hisilicon.com, guodong.xu@linaro.org, linux-doc@vger.kernel.org, w.f@huawei.com, zourongrong@huawei.com, linuxarm@huawei.com, xuwei5@hisilicon.com, bintian.wang@huawei.com, haojian.zhuang@linaro.org, benjamin.gaignard@linaro.org, puck.chen@hisilicon.com, liguozhu@hisilicon.com, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ADE display controller binding doc. Add DesignWare DSI Host Controller v1.20a binding doc. v7: Acked by Rob Herring. v6: - Cleanup values part of reg and clocks properties. - Change "pclk_dsi" clock name to "pclk". v5: - Remove endpoint unit address of dsi output port. - Add "hisilicon,noc-syscon" property for ADE NOC QoS syscon. - Add "resets" property for ADE reset. v4: - Describe more specific of clocks and ports. - Fix indentation. v3: - Make ade as the drm master node. - Use assigned-clocks to set clock rate. - Use ports to connect display relavant nodes. v2: - Move dt binding docs to bindings/display/hisilicon directory. Signed-off-by: Xinliang Liu Signed-off-by: Xinwei Kong Acked-by: Rob Herring --- .../bindings/display/hisilicon/dw-dsi.txt | 72 ++++++++++++++++++++++ .../bindings/display/hisilicon/hisi-ade.txt | 64 +++++++++++++++++++ 2 files changed, 136 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt diff --git a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt new file mode 100644 index 000000000000..d270bfe4e4e0 --- /dev/null +++ b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt @@ -0,0 +1,72 @@ +Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver + +A DSI Host Controller resides in the middle of display controller and external +HDMI converter or panel. + +Required properties: +- compatible: value should be "hisilicon,hi6220-dsi". +- reg: physical base address and length of dsi controller's registers. +- clocks: contains APB clock phandle + clock-specifier pair. +- clock-names: should be "pclk". +- ports: contains DSI controller input and output sub port. + The input port connects to ADE output port with the reg value "0". + The output port with the reg value "1", it could connect to panel or + any other bridge endpoints. + See Documentation/devicetree/bindings/graph.txt for more device graph info. + +A example of HiKey board hi6220 SoC and board specific DT entry: +Example: + +SoC specific: + dsi: dsi@f4107800 { + compatible = "hisilicon,hi6220-dsi"; + reg = <0x0 0xf4107800 0x0 0x100>; + clocks = <&media_ctrl HI6220_DSI_PCLK>; + clock-names = "pclk"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* 0 for input port */ + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <&ade_out>; + }; + }; + }; + }; + + +Board specific: + &dsi { + status = "ok"; + + ports { + /* 1 for output port */ + port@1 { + reg = <1>; + + dsi_out0: endpoint@0 { + remote-endpoint = <&adv7533_in>; + }; + }; + }; + }; + + &i2c2 { + ... + + adv7533: adv7533@39 { + ... + + port { + adv7533_in: endpoint { + remote-endpoint = <&dsi_out0>; + }; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt new file mode 100644 index 000000000000..38dc9d60eef8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt @@ -0,0 +1,64 @@ +Device-Tree bindings for hisilicon ADE display controller driver + +ADE (Advanced Display Engine) is the display controller which grab image +data from memory, do composition, do post image processing, generate RGB +timing stream and transfer to DSI. + +Required properties: +- compatible: value should be "hisilicon,hi6220-ade". +- reg: physical base address and length of the ADE controller's registers. +- hisilicon,noc-syscon: ADE NOC QoS syscon. +- resets: The ADE reset controller node. +- interrupt: the ldi vblank interrupt number used. +- clocks: a list of phandle + clock-specifier pairs, one for each entry + in clock-names. +- clock-names: should contain: + "clk_ade_core" for the ADE core clock. + "clk_codec_jpeg" for the media NOC QoS clock, which use the same clock with + jpeg codec. + "clk_ade_pix" for the ADE pixel clok. +- assigned-clocks: Should contain "clk_ade_core" and "clk_codec_jpeg" clocks' + phandle + clock-specifier pairs. +- assigned-clock-rates: clock rates, one for each entry in assigned-clocks. + The rate of "clk_ade_core" could be "360000000" or "180000000"; + The rate of "clk_codec_jpeg" could be or less than "1440000000". + These rate values could be configured according to performance and power + consumption. +- port: the output port. This contains one endpoint subnode, with its + remote-endpoint set to the phandle of the connected DSI input endpoint. + See Documentation/devicetree/bindings/graph.txt for more device graph info. + +Optional properties: +- dma-coherent: Present if dma operations are coherent. + + +A example of HiKey board hi6220 SoC specific DT entry: +Example: + + ade: ade@f4100000 { + compatible = "hisilicon,hi6220-ade"; + reg = <0x0 0xf4100000 0x0 0x7800>; + reg-names = "ade_base"; + hisilicon,noc-syscon = <&medianoc_ade>; + resets = <&media_ctrl MEDIA_ADE>; + interrupts = <0 115 4>; /* ldi interrupt */ + + clocks = <&media_ctrl HI6220_ADE_CORE>, + <&media_ctrl HI6220_CODEC_JPEG>, + <&media_ctrl HI6220_ADE_PIX_SRC>; + /*clock name*/ + clock-names = "clk_ade_core", + "clk_codec_jpeg", + "clk_ade_pix"; + + assigned-clocks = <&media_ctrl HI6220_ADE_CORE>, + <&media_ctrl HI6220_CODEC_JPEG>; + assigned-clock-rates = <360000000>, <288000000>; + dma-coherent; + + port { + ade_out: endpoint { + remote-endpoint = <&dsi_in>; + }; + }; + };