From patchwork Tue May 3 11:46:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 9003901 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 72AD29F6E1 for ; Tue, 3 May 2016 13:49:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 97F732024F for ; Tue, 3 May 2016 13:49:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A963E202C8 for ; Tue, 3 May 2016 13:49:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BCD516E82E; Tue, 3 May 2016 13:49:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DA636E37B; Tue, 3 May 2016 11:46:50 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP; 03 May 2016 04:46:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,572,1455004800"; d="scan'208";a="96238680" Received: from sorvi.fi.intel.com ([10.237.72.50]) by fmsmga004.fm.intel.com with ESMTP; 03 May 2016 04:46:43 -0700 From: Mika Kahola To: intel-gfx@lists.freedesktop.org Subject: [PATCH 3/3] drm/i915: Check HDMI TMDS clock rate from DPCD Date: Tue, 3 May 2016 14:46:38 +0300 Message-Id: <1462275998-4864-4-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462275998-4864-1-git-send-email-mika.kahola@intel.com> References: <1462275998-4864-1-git-send-email-mika.kahola@intel.com> X-Mailman-Approved-At: Tue, 03 May 2016 13:49:39 +0000 Cc: jim.bride@linux.intel.com, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Read TMDS clock rate from DPCD for HDMI to filter out modes that might require higher TMDS clock rate than supported. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 3 +++ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++--- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 74a04ce..0fd078c 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4591,6 +4591,9 @@ static void intel_dp_get_dfp(struct intel_dp *intel_dp) if (intel_dp->dfp.type & DP_DS_PORT_TYPE_VGA) { intel_dp->dfp.dot_clk = dfp_info[1] * 8 * 1000; DRM_DEBUG_KMS("max pixel rate for VGA is %d kHz\n", intel_dp->dfp.dot_clk); + } else if (!(intel_dp->dfp.type & DP_DS_PORT_TYPE_WIRELESS)) { + intel_dp->dfp.tmds_clk = DIV_ROUND_CLOSEST(dfp_info[1] * 25 * 1000, 10); + DRM_DEBUG_KMS("max TMDS clock is %d kHz\n", intel_dp->dfp.tmds_clk); } } } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 9798a59..8bf97da 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -799,6 +799,7 @@ struct intel_dp_dfp { int type; bool detailed_cap_info; int dot_clk; /* pixel rate for VGA dongles */ + int tmds_clk; }; struct intel_dp { diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index e1012d6..70e8e17 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1170,13 +1170,14 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder) static int hdmi_port_clock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit) { struct drm_device *dev = intel_hdmi_to_dev(hdmi); + int tmds_clock = hdmi_to_dig_port(hdmi)->dp.dfp.tmds_clk; if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev)) - return 165000; + return (tmds_clock > 0 ? min(165000, tmds_clock) : 165000); else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) - return 300000; + return (tmds_clock > 0 ? min(300000, tmds_clock) : 300000); else - return 225000; + return (tmds_clock > 0 ? min(225000, tmds_clock) : 225000); } static enum drm_mode_status