From patchwork Thu May 12 16:43:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mario Kleiner X-Patchwork-Id: 9084351 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D23CF9F1C3 for ; Thu, 12 May 2016 16:44:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C31BF2020F for ; Thu, 12 May 2016 16:44:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BAEA6201F2 for ; Thu, 12 May 2016 16:44:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 364B86E903; Thu, 12 May 2016 16:44:29 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id C22096E903 for ; Thu, 12 May 2016 16:44:27 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id n129so16923047wmn.1 for ; Thu, 12 May 2016 09:44:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XzV5Ui79OU49tqMCzbTPPgcF9uc5snAQrxrpA5lv5rk=; b=WVYOMiXHNr0vElfxqFwRapjPL2Vc/NCCfr241no+cfXXN2igbGoQ0AKl+xGgdS6EeQ RiLhshmv1QXJbDFZyHwNTl73c7wDInGFVCecOTyapq+FTzNu5quQ7pvU8a1PwKUd05nV 1o16D4HVmIOv1jB0b3aExCQcup/Pi3IteJDcPaPt4mVOFpy8WWQ4417JVAdNgX/syqXx dIdK9dlBuP7G+vHTjsVWKmDUlloT+Nbgoc7YEjgxqZa9l5WqpETdfK+XpDpRMdr+iFfT jRQLPGpFACgRAVTpzamRHJUVJ/kIju8pEI3STPdBnt6zvhMyI0OSca+8OjDCeziBau15 4T3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XzV5Ui79OU49tqMCzbTPPgcF9uc5snAQrxrpA5lv5rk=; b=B+/NWzSsfuMoyjE5G+rxZNpl8GFyRgbvKWFQEY6Dr6tXlzLOMYGZcVo/rj1CXS6avN iLM48abCbMK3qot+aytotJgYqgm1KPX8CaAMdPpAg5woO/w5kdAJXkmtQRK28dG6ALlO qVfXEKguQ7KR3klwnQfqC5IdZDXrAAAe0c4qfrtJizhBbRqF0bl0Z0r8wyziGau9jKgf GHo9oZJTFl9E3hDDxyutnHpSLaUzGvua4UzoRyfMoHFakcq9sFtiKczFGAlUZz6bJg0Z jfM0v9V1EcvtYo8AFVY5i46n2zfA9f6ie9d9B+RCI9OqWqmkCz+/ge/v8UQ8j4oRjN+1 TXiA== X-Gm-Message-State: AOPr4FXqlhUbABf+QJKt2OSkT+eGcNp8SIBO9tDZumk70Y//GlqhdWn6uxS2i7dIMtW69Q== X-Received: by 10.28.129.22 with SMTP id c22mr7718850wmd.89.1463071456489; Thu, 12 May 2016 09:44:16 -0700 (PDT) Received: from twisty.fritz.box (x5f70281c.dyn.telefonica.de. [95.112.40.28]) by smtp.gmail.com with ESMTPSA id o129sm41674834wmb.17.2016.05.12.09.44.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 May 2016 09:44:15 -0700 (PDT) From: Mario Kleiner To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/i915/dp: Try to find proper bpc for DP->legacy converters. (v2) Date: Thu, 12 May 2016 18:43:58 +0200 Message-Id: <1463071438-10786-1-git-send-email-mario.kleiner.de@gmail.com> X-Mailer: git-send-email 2.7.0 MIME-Version: 1.0 Cc: Daniel Vetter , stable@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This fixes a regression in output precision for DVI and VGA video sinks connected to Intel hw via active DisplayPort->DVI/VGA converters. The regression was indirectly introduced by commit 013dd9e03872 ("drm/i915/dp: fall back to 18 bpp when sink capability is unknown"). Our current drm edid 1.3 handling can't reliably assign a proper minimum supported display depth of 8 bpc to all DVI sinks, as mandated by DVI 1.0 spec, section 2.2.11.2 "Monitor data format support", but returns 0 bpc = "Don't know" instead. For analog VGA sinks it also returns 0 bpc, although those sinks themselves have infinite color depth, only restricted by the DAC resolution of the encoder. If a VGA or dual-link DVI display is connected via DisplayPort connector then due to above commit the driver would fall back to only 6 bpc, which would cause degradation for DVI and VGA displays, annoying in general, but especially harmful for application of display devices used in neuroscience research and for medical diagnosic which absolutely need native non-dithered 8 bpc at a minimum to operate correctly. For DP connectors with bpc == 0 according to EDID, fix this problem by checking the dpcd data to find out if a DP->legacy converter is connected. If the converter is DP->DVI/HDMI assume 8 bpc depth. If the converter is DP->VGA assume at least 8 bpc, but try to get a more accurate value (8, 10, 12 or 16 bpc) if the converter exposes this info. Only for a DP sink without downstream ports we assume it is a native DP sink and apply the 6 bpc / 18 bpp fallback as required by the DP spec. As the "fall back to 18 bpp" patch was backported to stable we should include this one also into stable to fix the regression in color precision. Tested with MiniDP->DP adapter, MiniDP->HDMI adapter, MiniDP->single-link DVI adapter, MiniDP->dual-link DVI active adapter, and Apple MiniDP->VGA active adapter. v2: Take Ville's feedback into account: Fold the 18 bpp fallback into the detection function, so it only applies to native DP sinks. Rename intel_dp_legacy_bpc() to intel_dp_sink_bpc(). Signed-off-by: Mario Kleiner Cc: Ville Syrjälä Cc: Daniel Vetter Cc: stable@vger.kernel.org --- drivers/gpu/drm/i915/intel_display.c | 12 ++++++-- drivers/gpu/drm/i915/intel_dp.c | 59 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 1 + 3 files changed, 69 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a297e1f..7ef52db 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12072,10 +12072,16 @@ connected_sink_compute_bpp(struct intel_connector *connector, int type = connector->base.connector_type; int clamp_bpp = 24; - /* Fall back to 18 bpp when DP sink capability is unknown. */ + /* On DisplayPort try harder to find sink bpc */ if (type == DRM_MODE_CONNECTOR_DisplayPort || - type == DRM_MODE_CONNECTOR_eDP) - clamp_bpp = 18; + type == DRM_MODE_CONNECTOR_eDP) { + int sink_bpc = intel_dp_sink_bpc(&connector->base); + + if (sink_bpc) { + DRM_DEBUG_KMS("DP sink with bpc %d\n", sink_bpc); + clamp_bpp = 3 * sink_bpc; + } + } if (bpp > clamp_bpp) { DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of %d\n", diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index f192f58..4dbb55b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -6046,3 +6046,62 @@ void intel_dp_mst_resume(struct drm_device *dev) } } } + +/* XXX Needs work for more than 1 downstream port */ +int intel_dp_sink_bpc(struct drm_connector *connector) +{ + struct intel_dp *intel_dp = intel_attached_dp(connector); + uint8_t *dpcd = intel_dp->dpcd; + uint8_t type; + int bpc = 0; + + /* + * If there isn't any downstream port then this is a native DP sink. + * The standard requires to fall back to 6 bpc / 18 bpp for native DP + * sinks which don't provide bit depth via EDID. + */ + if (!(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) + return 6; + + /* Basic type of downstream ports */ + type = dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_TYPE_MASK; + + /* + * Lacking other info, 8 bpc is a reasonable start for analog out. + * E.g., Apple MiniDP->VGA adaptors don't provide more info than + * that. Despite having DP_DPCD_REV == 0x11 their downstream_ports + * descriptor is empty - all zeros. + */ + if (type == DP_DWN_STRM_PORT_TYPE_ANALOG) + bpc = 8; + + if (dpcd[DP_DPCD_REV] < 0x11) + return bpc; + + /* Rev 1.1+. More specific downstream port type available */ + type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; + + /* VGA, DVI and HDMI support at least 8 bpc */ + if (type == DP_DS_PORT_TYPE_VGA || type == DP_DS_PORT_TYPE_DVI || + type == DP_DS_PORT_TYPE_HDMI) + bpc = 8; + + /* As of DP interop v1.1a only VGA defines additional detail */ + if (type != DP_DS_PORT_TYPE_VGA || + !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DETAILED_CAP_INFO_AVAILABLE)) + return bpc; + + /* VGA with DP_DETAILED_CAP_INFO_AVAILABLE provides bpc info */ + switch (intel_dp->downstream_ports[2] & DP_DS_VGA_MAX_BPC_MASK) { + case DP_DS_VGA_8BPC: + return 8; + case DP_DS_VGA_10BPC: + return 10; + case DP_DS_VGA_12BPC: + return 12; + case DP_DS_VGA_16BPC: + return 16; + } + + return bpc; +} diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 315c971..bdc977c 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1306,6 +1306,7 @@ void intel_edp_panel_off(struct intel_dp *intel_dp); void intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector); void intel_dp_mst_suspend(struct drm_device *dev); void intel_dp_mst_resume(struct drm_device *dev); +int intel_dp_sink_bpc(struct drm_connector *connector); int intel_dp_max_link_rate(struct intel_dp *intel_dp); int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); void intel_dp_hot_plug(struct intel_encoder *intel_encoder);