From patchwork Mon May 16 13:19:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 9110401 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 189FBBF4C7 for ; Tue, 17 May 2016 08:09:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1DA20202FE for ; Tue, 17 May 2016 08:09:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 55379201ED for ; Tue, 17 May 2016 08:08:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 13C006E641; Tue, 17 May 2016 08:08:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id BEFCB6E42F; Mon, 16 May 2016 13:19:44 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 16 May 2016 06:19:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,627,1455004800"; d="scan'208";a="982011240" Received: from sorvi.fi.intel.com ([10.237.72.50]) by fmsmga002.fm.intel.com with ESMTP; 16 May 2016 06:19:43 -0700 From: Mika Kahola To: dri-devel@lists.freedesktop.org Subject: [PATCH v2 2/7] drm: Read DPCD receiver capability for DP to VGA converter Date: Mon, 16 May 2016 16:19:28 +0300 Message-Id: <1463404773-5167-3-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463404773-5167-1-git-send-email-mika.kahola@intel.com> References: <1463404773-5167-1-git-send-email-mika.kahola@intel.com> X-Mailman-Approved-At: Tue, 17 May 2016 08:08:36 +0000 Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org, jim.bish@intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Read from DPCD receiver capability field the max allowed pixel clock and bits per component for DP to VGA converter. Signed-off-by: Mika Kahola --- drivers/gpu/drm/drm_dp_helper.c | 46 ++++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ include/drm/drm_dp_helper.h | 21 ++++++++++++++++++ 3 files changed, 69 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index eeaf5a7..c5bec6f 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -412,6 +412,52 @@ int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link) } EXPORT_SYMBOL(drm_dp_link_power_down); +/* + * drm_dp_bd() - read DisplayPort Receiver Capability Fields for + * DP branch devices + * @aux: DisplayPort AUX channel + * @bd: pointer to a structure containing DP branch device information + * + * Returns 0 on success or a negative error code on failure. + */ +int drm_dp_bd(struct drm_dp_aux *aux, struct drm_dp_bd *bd) +{ + uint8_t info[4]; + uint8_t dfp; + bool detailed_cap_info; + int err, size; + + err = drm_dp_dpcd_read(aux, DP_DOWNSTREAMPORT_PRESENT, &dfp, sizeof(dfp)); + if (err < 0) + return err; + + bd->present = dfp & 0x1; + + if (!bd->present) + return 0; + + detailed_cap_info = dfp & DP_DETAILED_CAP_INFO_AVAILABLE; + + size = detailed_cap_info ? 4 : 1; + + err = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, info, size); + if (err < 0) + return err; + + bd->type = info[0] & DP_DS_PORT_TYPE_MASK; + bd->hpd = info[0] & DP_DS_PORT_HPD; + + if (detailed_cap_info) { + if (bd->type & DP_DS_PORT_TYPE_VGA) { + bd->dfp.vga.dot_clk = info[1] * 8 * 1000; + bd->dfp.vga.bpc = info[2] & DP_DS_VGA_MAX_BPC_MASK; + } + } + + return 0; +} +EXPORT_SYMBOL(drm_dp_bd); + /** * drm_dp_link_configure() - configure a DisplayPort link * @aux: DisplayPort AUX channel diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 94a44af..7d2d93f 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -866,6 +866,8 @@ struct intel_dp { bool train_set_valid; + struct drm_dp_bd bd; + /* Displayport compliance testing */ unsigned long compliance_test_type; unsigned long compliance_test_data; diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 4049af9..fe6cfdc 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -801,10 +801,31 @@ struct drm_dp_link { unsigned long capabilities; }; +/* + * DP to VGA + */ +struct drm_dp_vga { + int dot_clk; + uint8_t bpc; +}; + +/* + * Branch device + */ +struct drm_dp_bd { + bool present; + int type; + bool hpd; + union { + struct drm_dp_vga vga; + } dfp; +}; + int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link); +int drm_dp_bd(struct drm_dp_aux *aux, struct drm_dp_bd *bd); int drm_dp_aux_register(struct drm_dp_aux *aux); void drm_dp_aux_unregister(struct drm_dp_aux *aux);