From patchwork Thu Jun 23 14:13:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 9195333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DCC746077D for ; Thu, 23 Jun 2016 14:15:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CDF4E26B39 for ; Thu, 23 Jun 2016 14:15:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C2BD52844A; Thu, 23 Jun 2016 14:15:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, TVD_SUBJ_WIPE_DEBT autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6DA4C26B39 for ; Thu, 23 Jun 2016 14:15:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3424E6E95B; Thu, 23 Jun 2016 14:15:48 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4FAAF6E966 for ; Thu, 23 Jun 2016 14:15:12 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 490EC6137E; Thu, 23 Jun 2016 14:15:12 +0000 (UTC) Received: from localhost (unknown [202.46.23.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A6E5761368; Thu, 23 Jun 2016 14:15:10 +0000 (UTC) From: Archit Taneja To: robdclark@gmail.com Subject: [PATCH v2 23/25] dt-bindings: display/msm: Remove power domain property from encoder nodes Date: Thu, 23 Jun 2016 19:43:28 +0530 Message-Id: <1466691210-22779-24-git-send-email-architt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1466691210-22779-1-git-send-email-architt@codeaurora.org> References: <1466077007-26792-1-git-send-email-architt@codeaurora.org> <1466691210-22779-1-git-send-email-architt@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Remove the power-domain property from the DSI, HDMI and eDP dt-binding docs. The power domain only needs to be specified in the parent MDSS device node (that too only for SoCs which contain MDSS). Signed-off-by: Archit Taneja --- Documentation/devicetree/bindings/display/msm/dsi.txt | 3 --- Documentation/devicetree/bindings/display/msm/edp.txt | 2 -- Documentation/devicetree/bindings/display/msm/hdmi.txt | 4 ---- 3 files changed, 9 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt index e6933a8..c1ef181 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi.txt +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt @@ -8,7 +8,6 @@ Required properties: - reg-names: The names of register regions. The following regions are required: * "dsi_ctrl" - interrupts: The interrupt signal from the DSI block. -- power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: Phandles to device clocks. - clock-names: the following clocks are required: * "mdp_core_clk" @@ -94,7 +93,6 @@ Required properties: * "dsi_phy_regulator" - clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating 2 clocks: A byte clock (index 0), and a pixel clock (index 1). -- power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: Phandles to device clocks. See [1] for details on clock bindings. - clock-names: the following clocks are required: * "iface_clk" @@ -116,7 +114,6 @@ Example: interrupts = <4 0>; reg-names = "dsi_ctrl"; reg = <0xfd922800 0x200>; - power-domains = <&mmcc MDSS_GDSC>; clock-names = "bus_clk", "byte_clk", diff --git a/Documentation/devicetree/bindings/display/msm/edp.txt b/Documentation/devicetree/bindings/display/msm/edp.txt index 3a20f6e..e712dfa 100644 --- a/Documentation/devicetree/bindings/display/msm/edp.txt +++ b/Documentation/devicetree/bindings/display/msm/edp.txt @@ -8,7 +8,6 @@ Required properties: * "edp" * "pll_base" - interrupts: The interrupt signal from the eDP block. -- power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: device clocks See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details. - clock-names: the following clocks are required: @@ -39,7 +38,6 @@ Example: <0xfd923a00 0xd4>; interrupt-parent = <&mdss_mdp>; interrupts = <12 0>; - power-domains = <&mmcc MDSS_GDSC>; clock-names = "core_clk", "pixel_clk", diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt b/Documentation/devicetree/bindings/display/msm/hdmi.txt index b63f614..ce84459 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.txt +++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt @@ -11,7 +11,6 @@ Required properties: - reg: Physical base address and length of the controller's registers - reg-names: "core_physical" - interrupts: The interrupt signal from the hdmi block. -- power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: device clocks See ../clocks/clock-bindings.txt for details. - qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin @@ -48,7 +47,6 @@ Required properties: * "hdmi_tx_l1" * "hdmi_tx_l3" * "hdmi_tx_l4" -- power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: device clocks See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details. - core-vdda-supply: phandle to vdda regulator device node @@ -63,7 +61,6 @@ Example: reg-names = "core_physical"; reg = <0x04a00000 0x2f0>; interrupts = ; - power-domains = <&mmcc MDSS_GDSC>; clock-names = "core_clk", "master_iface_clk", @@ -92,7 +89,6 @@ Example: reg = <0x4a00400 0x60>, <0x4a00500 0x100>; #phy-cells = <0>; - power-domains = <&mmcc MDSS_GDSC>; clock-names = "slave_iface_clk"; clocks = <&mmcc HDMI_S_AHB_CLK>; core-vdda-supply = <&pm8921_hdmi_mvs>;