From patchwork Wed Aug 17 17:23:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 9286255 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 681BA60839 for ; Wed, 17 Aug 2016 17:23:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 57EF7294AC for ; Wed, 17 Aug 2016 17:23:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4C337294C0; Wed, 17 Aug 2016 17:23:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D76F2294AC for ; Wed, 17 Aug 2016 17:23:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EE85F6E312; Wed, 17 Aug 2016 17:23:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf0-x22b.google.com (mail-pf0-x22b.google.com [IPv6:2607:f8b0:400e:c00::22b]) by gabe.freedesktop.org (Postfix) with ESMTPS id E57FD6E312 for ; Wed, 17 Aug 2016 17:23:04 +0000 (UTC) Received: by mail-pf0-x22b.google.com with SMTP id p64so39371447pfb.1 for ; Wed, 17 Aug 2016 10:23:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lhA99soxLS1etelhYqBD4icoxLMrF0V1IUjFK+hbFic=; b=T7LnKTPqZNQ/zqTPMdazaUnezyPeDOM+o9tTVJb+yyeMrjX+rx4FK6MzAPQIkDTnv8 5QSY9yRrSaeAv/vmG77vtrit8alFJTEd36Kz6IwF1EXPvRUf0dpgOQ+PmE8IpCKLMEgT 1O0BZDi7qwD8CceCkcrexN87Do+D+QIx+Ekh8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lhA99soxLS1etelhYqBD4icoxLMrF0V1IUjFK+hbFic=; b=Q9SeecsUtLzTZ492KltlaOwFdEuiLu/Dhfbm2Q/KEBXT1r4x0VMyjg1+6wDoijoetL iyrkfUJCxgEgQyIdkIWjkWgzN5HNi2J6Dut310X8J34+aove/gNUzRF4YCwlB4f3L3kC VSKvYJMarAiuc1yaoXDymyGSyh+iNjCO8DtXLfzULjXPnm6ea+CtOr+b9rvzLH7zCU43 2jGboiNBXfa7+MQMjT6WaZqX5Axbh/pEWhIUGVWDPcJ33bU0Y8Fe98uv0zjrMs/gobpH anzzLg4xuro5wc8mqtnj3PNzCROGoS3gBtDYtJ+FxF0JaxA8jQgKEev8jBcApVJBBDTB lBlA== X-Gm-Message-State: AEkoouvMgHCJQQqGRpVAs8VUkn92HGLa+60cQmthdKL6mpKzXvmms6G6ETjBet/XBEQY3kX1 X-Received: by 10.98.206.129 with SMTP id y123mr24764596pfg.7.1471454584528; Wed, 17 Aug 2016 10:23:04 -0700 (PDT) Received: from seanpaul0.corp.google.com ([172.22.162.59]) by smtp.gmail.com with ESMTPSA id 89sm48609965pft.96.2016.08.17.10.23.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 Aug 2016 10:23:03 -0700 (PDT) From: Sean Paul To: tfiga@chromium.org, dri-devel@lists.freedesktop.org, mark.yao@rock-chips.com Subject: [PATCH v3 3/5] drm/rockchip: vop: introduce VOP_REG_MASK Date: Wed, 17 Aug 2016 10:23:00 -0700 Message-Id: <1471454580-2286-1-git-send-email-seanpaul@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: References: Cc: linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Mark Yao Some new vop register support mask, bit[16-31] is mask, bit[0-15] is value, the mask is correspond to the value. Signed-off-by: Mark Yao [seanpaul masked 'v' per tfiga's review comments] Signed-off-by: Sean Paul --- Changes in v3: - Masked v in vop_mask_write to avoid stomping other bits (Tomasz) drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 45 +++++++++++++++-------------- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 9 +++++- 3 files changed, 32 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 91305eb..5047507 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -36,15 +36,18 @@ #include "rockchip_drm_fb.h" #include "rockchip_drm_vop.h" -#define __REG_SET_RELAXED(x, off, mask, shift, v) \ - vop_mask_write_relaxed(x, off, (mask) << shift, (v) << shift) -#define __REG_SET_NORMAL(x, off, mask, shift, v) \ - vop_mask_write(x, off, (mask) << shift, (v) << shift) +#define __REG_SET_RELAXED(x, off, mask, shift, v, write_mask) \ + vop_mask_write(x, off, mask, shift, v, write_mask, true) + +#define __REG_SET_NORMAL(x, off, mask, shift, v, write_mask) \ + vop_mask_write(x, off, mask, shift, v, write_mask, false) #define REG_SET(x, base, reg, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) + __REG_SET_##mode(x, base + reg.offset, \ + reg.mask, reg.shift, v, reg.write_mask) #define REG_SET_MASK(x, base, reg, mask, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, mask, reg.shift, v) + __REG_SET_##mode(x, base + reg.offset, \ + mask, reg.shift, v, reg.write_mask) #define VOP_WIN_SET(x, win, name, v) \ REG_SET(x, win->base, win->phy->name, v, RELAXED) @@ -164,27 +167,25 @@ static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, } static inline void vop_mask_write(struct vop *vop, uint32_t offset, - uint32_t mask, uint32_t v) + uint32_t mask, uint32_t shift, uint32_t v, + bool write_mask, bool relaxed) { - if (mask) { - uint32_t cached_val = vop->regsbak[offset >> 2]; - - cached_val = (cached_val & ~mask) | v; - writel(cached_val, vop->regs + offset); - vop->regsbak[offset >> 2] = cached_val; - } -} + if (!mask) + return; -static inline void vop_mask_write_relaxed(struct vop *vop, uint32_t offset, - uint32_t mask, uint32_t v) -{ - if (mask) { + if (write_mask) { + v = ((v << shift) & 0xffff) | (mask << (shift + 16)); + } else { uint32_t cached_val = vop->regsbak[offset >> 2]; - cached_val = (cached_val & ~mask) | v; - writel_relaxed(cached_val, vop->regs + offset); - vop->regsbak[offset >> 2] = cached_val; + v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); + vop->regsbak[offset >> 2] = v; } + + if (relaxed) + writel_relaxed(v, vop->regs + offset); + else + writel(v, vop->regs + offset); } static inline uint32_t vop_get_intr_type(struct vop *vop, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 071ff0b..28dafb6 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -33,6 +33,7 @@ struct vop_reg { uint32_t offset; uint32_t shift; uint32_t mask; + bool write_mask; }; struct vop_ctrl { diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 44caf14..e3f72ba 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -23,7 +23,14 @@ #define VOP_REG(off, _mask, s) \ {.offset = off, \ .mask = _mask, \ - .shift = s,} + .shift = s, \ + .write_mask = false,} + +#define VOP_REG_MASK(off, _mask, s) \ + {.offset = off, \ + .mask = _mask, \ + .shift = s, \ + .write_mask = true,} static const uint32_t formats_win_full[] = { DRM_FORMAT_XRGB8888,