From patchwork Fri Feb 3 09:51:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Abriou X-Patchwork-Id: 9553697 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 839A7604A7 for ; Fri, 3 Feb 2017 09:51:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 75D9E28462 for ; Fri, 3 Feb 2017 09:51:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6AAF5284E7; Fri, 3 Feb 2017 09:51:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3DEC128462 for ; Fri, 3 Feb 2017 09:51:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C80F76EB3B; Fri, 3 Feb 2017 09:51:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4BCF86EB39 for ; Fri, 3 Feb 2017 09:51:36 +0000 (UTC) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id v139nVRq019921; Fri, 3 Feb 2017 10:51:34 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-.pphosted.com with ESMTP id 288k2j67sh-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 03 Feb 2017 10:51:34 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 151A743; Fri, 3 Feb 2017 09:51:29 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F344F279C; Fri, 3 Feb 2017 09:51:28 +0000 (GMT) Received: from localhost (10.201.23.35) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 3 Feb 2017 10:51:28 +0100 From: Vincent Abriou To: Subject: [PATCH 2/3] drm/sti: do not set gdp pixel clock rate if mode is not set Date: Fri, 3 Feb 2017 10:51:23 +0100 Message-ID: <1486115484-13906-3-git-send-email-vincent.abriou@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486115484-13906-1-git-send-email-vincent.abriou@st.com> References: <1486115484-13906-1-git-send-email-vincent.abriou@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.35] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-02-03_08:, , signatures=0 Cc: Yannick Fertre , Vincent Abriou , Fabien Dessenne X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Fix a division by 0 case : in some cases, when the GDP plane is being disabled atomic_check() is called with "mode->clock = 0". In that case, do not set parent and pixel clock rate. Signed-off-by: Vincent Abriou --- drivers/gpu/drm/sti/sti_gdp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c index 7255234..7f6d079 100644 --- a/drivers/gpu/drm/sti/sti_gdp.c +++ b/drivers/gpu/drm/sti/sti_gdp.c @@ -648,7 +648,7 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane, } /* Set gdp clock */ - if (gdp->clk_pix) { + if (mode->clock && gdp->clk_pix) { struct clk *clkp; int rate = mode->clock * 1000; int res;