From patchwork Tue Apr 4 12:15:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 9661497 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 31F1260352 for ; Tue, 4 Apr 2017 12:16:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2587227CF3 for ; Tue, 4 Apr 2017 12:16:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1A49C28504; Tue, 4 Apr 2017 12:16:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 693F427CF3 for ; Tue, 4 Apr 2017 12:16:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 815AF6E5BB; Tue, 4 Apr 2017 12:15:54 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr0-x236.google.com (mail-wr0-x236.google.com [IPv6:2a00:1450:400c:c0c::236]) by gabe.freedesktop.org (Postfix) with ESMTPS id 99CA26E5BB for ; Tue, 4 Apr 2017 12:15:51 +0000 (UTC) Received: by mail-wr0-x236.google.com with SMTP id w11so210514818wrc.3 for ; Tue, 04 Apr 2017 05:15:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dIL6e15IFKJbj3GL5w8rVosiIvAhEmJVBIuEXdcP+Dc=; b=qVoxIVKc60Yw5AHow0vPRltBWFBEK3m6rmcu2+5Rhq4PRBFbEFKWuRqNfrpUMHJu6c QyffyKfBa1vSahMBtZLsHslSgcqehBOWUWQFxbryGIrOlWXqwbrY2XzbgI25f8V0S8Ms rfNZ5iwvp77zWltlCHnOaOzKu+qmmAOH6ioT4yovoUrTFUBl4AIHTgj+FryF+Vz2KO15 DM/Vmq3+U/RpB4qBjDymhzy3bd3ogWhFE2Im0k8oMnwwgbXOBwXAO2x3vnW3vHijQQUH aUfoD5MyPF9S0mWLghPGPPX6wvSQ1lB+0Io1miJdpvZJ7zK+c4M5B2/lIjPBW/Y8ncEp K5KQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dIL6e15IFKJbj3GL5w8rVosiIvAhEmJVBIuEXdcP+Dc=; b=fOKhITqJ2wSDcIoWiGNvew/ntGWdA3+nz34+8qB28jbAqd9SI9z1qC8S5E3E9I0fyP qZWCrwJOlZj7U/CQ5015PsFEXoaOnJCJCcQyueqoXVREaeRTrLjz7SPrlSFIVUhXUEvb c2sbao0pPNzkCisUSXa5T84ZJ/FA8VorJADw51UieY0rr1rfuNM2KyrsgvcZuqEZ6RI9 BlIBT3gQM2sm3pBmkzFOtWh2+vN7f8mjZzCV0ZXukfXw4UF+cVcoUbCvoHkInU6ajAIf FxXne9blf80fznoEiYhkMeGGopCvsYzSQPmep6FJK3Si0356J+s94DgiRAiI2M5zBYF9 SZaQ== X-Gm-Message-State: AFeK/H30RirlMg4kSwOxATowVTFbZU5jGAwedSdYJhiWbSPNqD2idqQbkb4f/I+/OV5viQCu X-Received: by 10.28.196.68 with SMTP id u65mr14859472wmf.8.1491308149402; Tue, 04 Apr 2017 05:15:49 -0700 (PDT) Received: from zoidberg.local ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id a66sm250242wrc.58.2017.04.04.05.15.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Apr 2017 05:15:48 -0700 (PDT) From: Neil Armstrong To: airlied@linux.ie Subject: [PATCH v3 09/11] drm/meson: Convert existing documentation to actual kerneldoc Date: Tue, 4 Apr 2017 14:15:29 +0200 Message-Id: <1491308131-22071-10-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1491308131-22071-1-git-send-email-narmstrong@baylibre.com> References: <1491308131-22071-1-git-send-email-narmstrong@baylibre.com> Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Acked-by: Daniel Vetter Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_canvas.c | 4 +++- drivers/gpu/drm/meson/meson_drv.c | 5 +++-- drivers/gpu/drm/meson/meson_dw_hdmi.c | 25 +++++++++++++++++-------- drivers/gpu/drm/meson/meson_vclk.c | 22 +++++++++++++++------- drivers/gpu/drm/meson/meson_venc.c | 25 ++++++++++++++++--------- drivers/gpu/drm/meson/meson_viu.c | 6 +++++- drivers/gpu/drm/meson/meson_vpp.c | 8 ++++++-- 7 files changed, 65 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_canvas.c b/drivers/gpu/drm/meson/meson_canvas.c index 4109e36..08f6073 100644 --- a/drivers/gpu/drm/meson/meson_canvas.c +++ b/drivers/gpu/drm/meson/meson_canvas.c @@ -24,7 +24,9 @@ #include "meson_canvas.h" #include "meson_registers.h" -/* +/** + * DOC: Canvas + * * CANVAS is a memory zone where physical memory frames information * are stored for the VIU to scanout. */ diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c index a2e9f56..75382f5 100644 --- a/drivers/gpu/drm/meson/meson_drv.c +++ b/drivers/gpu/drm/meson/meson_drv.c @@ -52,13 +52,14 @@ #define DRIVER_NAME "meson" #define DRIVER_DESC "Amlogic Meson DRM driver" -/* - * Video Processing Unit +/** + * DOC: Video Processing Unit * * VPU Handles the Global Video Processing, it includes management of the * clocks gates, blocks reset lines and power domains. * * What is missing : + * * - Full reset of entire video processing HW blocks * - Scaling and setup of the VPU clock * - Bus clock gates diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c index 8851dcb..7b86eb7 100644 --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c @@ -42,18 +42,25 @@ #define DRIVER_NAME "meson-dw-hdmi" #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver" -/* +/** + * DOC: HDMI Output + * * HDMI Output is composed of : + * * - A Synopsys DesignWare HDMI Controller IP * - A TOP control block controlling the Clocks and PHY * - A custom HDMI PHY in order convert video to TMDS signal - * ___________________________________ - * | HDMI TOP |<= HPD - * |___________________________________| - * | | | - * | Synopsys HDMI | HDMI PHY |=> TMDS - * | Controller |________________| - * |___________________________________|<=> DDC + * + * .. code:: + * + * ___________________________________ + * | HDMI TOP |<= HPD + * |___________________________________| + * | | | + * | Synopsys HDMI | HDMI PHY |=> TMDS + * | Controller |________________| + * |___________________________________|<=> DDC + * * * The HDMI TOP block only supports HPD sensing. * The Synopsys HDMI Controller interrupt is routed @@ -78,6 +85,7 @@ * audio source interfaces. * * We handle the following features : + * * - HPD Rise & Fall interrupt * - HDMI Controller Interrupt * - HDMI PHY Init for 480i to 1080p60 @@ -85,6 +93,7 @@ * - VENC Mode setup for 480i to 1080p60 * * What is missing : + * * - PHY, Clock and Mode setup for 2k && 4k modes * - SDDC Scrambling mode for HDMI 2.0a * - HDCP Setup diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c index 3731479..4767704 100644 --- a/drivers/gpu/drm/meson/meson_vclk.c +++ b/drivers/gpu/drm/meson/meson_vclk.c @@ -23,21 +23,29 @@ #include "meson_drv.h" #include "meson_vclk.h" -/* +/** + * DOC: Video Clocks + * * VCLK is the "Pixel Clock" frequency generator from a dedicated PLL. * We handle the following encodings : + * * - CVBS 27MHz generator via the VCLK2 to the VENCI and VDAC blocks * - HDMI Pixel Clocks generation + * * What is missing : + * * - Genenate Pixel clocks for 2K/4K 10bit formats * * Clock generator scheme : - * __________ _________ _____ - * | | | | | |--ENCI - * | HDMI PLL |-| PLL_DIV |--- VCLK--| |--ENCL - * |__________| |_________| \ | MUX |--ENCP - * --VCLK2-| |--VDAC - * |_____|--HDMI-TX + * + * .. code:: + * + * __________ _________ _____ + * | | | | | |--ENCI + * | HDMI PLL |-| PLL_DIV |--- VCLK--| |--ENCL + * |__________| |_________| \ | MUX |--ENCP + * --VCLK2-| |--VDAC + * |_____|--HDMI-TX * * Final clocks can take input for either VCLK or VCLK2, but * VCLK is the preferred path for HDMI clocking and VCLK2 is the diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c index 31dc275..9509017 100644 --- a/drivers/gpu/drm/meson/meson_venc.c +++ b/drivers/gpu/drm/meson/meson_venc.c @@ -26,26 +26,33 @@ #include "meson_vclk.h" #include "meson_registers.h" -/* +/** + * DOC: Video Encoder + * * VENC Handle the pixels encoding to the output formats. * We handle the following encodings : + * * - CVBS Encoding via the ENCI encoder and VDAC digital to analog converter * - TMDS/HDMI Encoding via ENCI_DIV and ENCP * - Setup of more clock rates for HDMI modes * * What is missing : + * * - LCD Panel encoding via ENCL * - TV Panel encoding via ENCT * * VENC paths : - * _____ _____ ____________________ - * vd1---| |-| | | VENC /---------|----VDAC - * vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|\ - * osd1--| |-| | | \ | X--HDMI-TX - * osd2--|_____|-|_____| | |\-ENCP--ENCP_DVI-|/ - * | | | - * | \--ENCL-----------|----LVDS - * |____________________| + * + * .. code:: + * + * _____ _____ ____________________ + * vd1---| |-| | | VENC /---------|----VDAC + * vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|-| + * osd1--| |-| | | \ | X--HDMI-TX + * osd2--|_____|-|_____| | |\-ENCP--ENCP_DVI-|-| + * | | | + * | \--ENCL-----------|----LVDS + * |____________________| * * The ENCI is designed for PAl or NTSC encoding and can go through the VDAC * directly for CVBS encoding or through the ENCI_DVI encoder for HDMI. diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c index a6de8ba..6bcfa52 100644 --- a/drivers/gpu/drm/meson/meson_viu.c +++ b/drivers/gpu/drm/meson/meson_viu.c @@ -28,9 +28,12 @@ #include "meson_canvas.h" #include "meson_registers.h" -/* +/** + * DOC: Video Input Unit + * * VIU Handles the Pixel scanout and the basic Colorspace conversions * We handle the following features : + * * - OSD1 RGB565/RGB888/xRGB8888 scanout * - RGB conversion to x/cb/cr * - Progressive or Interlace buffer scanout @@ -38,6 +41,7 @@ * - HDR OSD matrix for GXL/GXM * * What is missing : + * * - BGR888/xBGR8888/BGRx8888/BGRx8888 modes * - YUV4:2:2 Y0CbY1Cr scanout * - Conversion to YUV 4:4:4 from 4:2:2 input diff --git a/drivers/gpu/drm/meson/meson_vpp.c b/drivers/gpu/drm/meson/meson_vpp.c index 671909d..27356f8 100644 --- a/drivers/gpu/drm/meson/meson_vpp.c +++ b/drivers/gpu/drm/meson/meson_vpp.c @@ -25,16 +25,20 @@ #include "meson_vpp.h" #include "meson_registers.h" -/* +/** + * DOC: Video Post Processing + * * VPP Handles all the Post Processing after the Scanout from the VIU * We handle the following post processings : - * - Postblend : Blends the OSD1 only + * + * - Postblend, Blends the OSD1 only * We exclude OSD2, VS1, VS1 and Preblend output * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and * use it only for interlace scanout * - Intermediate FIFO with default Amlogic values * * What is missing : + * * - Preblend for video overlay pre-scaling * - OSD2 support for cursor framebuffer * - Video pre-scaling before postblend