From patchwork Tue Sep 26 08:02:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 9971341 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 81A3E60365 for ; Tue, 26 Sep 2017 07:31:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7423528EE9 for ; Tue, 26 Sep 2017 07:31:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7277D28F7B; Tue, 26 Sep 2017 07:31:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3C5A928F5F for ; Tue, 26 Sep 2017 07:31:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DFD3F6E40B; Tue, 26 Sep 2017 07:30:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 431BD6E413; Tue, 26 Sep 2017 07:30:53 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Sep 2017 00:30:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,440,1500966000"; d="scan'208"; a="1175838238" Received: from ubuntu-tc11.iind.intel.com ([10.223.25.173]) by orsmga001.jf.intel.com with ESMTP; 26 Sep 2017 00:30:51 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [RFC v1 5/6] drm: Define helper to set legacy gamma table size Date: Tue, 26 Sep 2017 13:32:57 +0530 Message-Id: <1506412979-22028-6-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1506412979-22028-1-git-send-email-uma.shankar@intel.com> References: <1506412979-22028-1-git-send-email-uma.shankar@intel.com> Cc: Uma Shankar , ville.syrjala@intel.com, maarten.lankhorst@intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Define a helper function to set legacy gamma table size for planes. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_color_mgmt.c | 41 ++++++++++++++++++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 3 +++ include/drm/drm_plane.h | 4 ++++ 3 files changed, 48 insertions(+) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index fe09827..8aef6b5 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -204,6 +204,47 @@ int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, EXPORT_SYMBOL(drm_mode_crtc_set_gamma_size); /** + * drm_mode_plane_set_gamma_size - set the gamma table size + * @plane: Plane to set the gamma table size for + * @gamma_size: size of the gamma table + * + * Drivers which support gamma tables should set this to the supported gamma + * table size when initializing the Plane. Currently the drm core only supports + * a fixed gamma table size. + * + * Returns: + * Zero on success, negative errno on failure. + */ +int drm_mode_plane_set_gamma_size(struct drm_plane *plane, + int gamma_size) +{ + uint16_t *r_base, *g_base, *b_base; + int i; + + plane->gamma_size = gamma_size; + + plane->gamma_store = kcalloc(gamma_size, sizeof(uint16_t) * 3, + GFP_KERNEL); + if (!plane->gamma_store) { + plane->gamma_size = 0; + return -ENOMEM; + } + + r_base = plane->gamma_store; + g_base = r_base + gamma_size; + b_base = g_base + gamma_size; + for (i = 0; i < gamma_size; i++) { + r_base[i] = i << 8; + g_base[i] = i << 8; + b_base[i] = i << 8; + } + + + return 0; +} +EXPORT_SYMBOL(drm_mode_plane_set_gamma_size); + +/** * drm_mode_gamma_set_ioctl - set the gamma table * @dev: DRM device * @data: ioctl data diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index 155a9ba..2f59c82 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -42,4 +42,7 @@ void drm_plane_enable_color_mgmt(struct drm_plane *plane, bool plane_has_ctm, uint plane_gamma_lut_size); +int drm_mode_plane_set_gamma_size(struct drm_plane *plane, + int plane_gamma_size); + #endif diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 172d0c1..7dc8e53 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -575,6 +575,10 @@ struct drm_plane { struct drm_property *zpos_property; struct drm_property *rotation_property; + + /* Legacy FB Plane gamma size for reporting to userspace */ + uint32_t gamma_size; + uint16_t *gamma_store; }; #define obj_to_plane(x) container_of(x, struct drm_plane, base)